drivers/media/i2c/saa7127.c

Source file repositories/reference/linux-study-clean/drivers/media/i2c/saa7127.c

File Facts

System
Linux kernel
Corpus path
drivers/media/i2c/saa7127.c
Extension
.c
Size
25484 bytes
Lines
819
Domain
Driver Families
Bucket
drivers/media
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct i2c_reg_value {
	unsigned char reg;
	unsigned char value;
};

static const struct i2c_reg_value saa7129_init_config_extra[] = {
	{ SAA7127_REG_OUTPUT_PORT_CONTROL,		0x38 },
	{ SAA7127_REG_VTRIG,				0xfa },
	{ 0, 0 }
};

static const struct i2c_reg_value saa7127_init_config_common[] = {
	{ SAA7127_REG_WIDESCREEN_CONFIG,		0x0d },
	{ SAA7127_REG_WIDESCREEN_ENABLE,		0x00 },
	{ SAA7127_REG_COPYGEN_0,			0x77 },
	{ SAA7127_REG_COPYGEN_1,			0x41 },
	{ SAA7127_REG_COPYGEN_2,			0x00 },	/* Macrovision enable/disable */
	{ SAA7127_REG_OUTPUT_PORT_CONTROL,		0xbf },
	{ SAA7127_REG_GAIN_LUMINANCE_RGB,		0x00 },
	{ SAA7127_REG_GAIN_COLORDIFF_RGB,		0x00 },
	{ SAA7127_REG_INPUT_PORT_CONTROL_1,		0x80 },	/* for color bars */
	{ SAA7127_REG_LINE_21_ODD_0,			0x77 },
	{ SAA7127_REG_LINE_21_ODD_1,			0x41 },
	{ SAA7127_REG_LINE_21_EVEN_0,			0x88 },
	{ SAA7127_REG_LINE_21_EVEN_1,			0x41 },
	{ SAA7127_REG_RCV_PORT_CONTROL,			0x12 },
	{ SAA7127_REG_VTRIG,				0xf9 },
	{ SAA7127_REG_HTRIG_HI,				0x00 },
	{ SAA7127_REG_RCV2_OUTPUT_START,		0x41 },
	{ SAA7127_REG_RCV2_OUTPUT_END,			0xc3 },
	{ SAA7127_REG_RCV2_OUTPUT_MSBS,			0x00 },
	{ SAA7127_REG_TTX_REQUEST_H_START,		0x3e },
	{ SAA7127_REG_TTX_REQUEST_H_DELAY_LENGTH,	0xb8 },
	{ SAA7127_REG_CSYNC_ADVANCE_VSYNC_SHIFT,	0x03 },
	{ SAA7127_REG_TTX_ODD_REQ_VERT_START,		0x15 },
	{ SAA7127_REG_TTX_ODD_REQ_VERT_END,		0x16 },
	{ SAA7127_REG_TTX_EVEN_REQ_VERT_START,		0x15 },
	{ SAA7127_REG_TTX_EVEN_REQ_VERT_END,		0x16 },
	{ SAA7127_REG_FIRST_ACTIVE,			0x1a },
	{ SAA7127_REG_LAST_ACTIVE,			0x01 },
	{ SAA7127_REG_MSB_VERTICAL,			0xc0 },
	{ SAA7127_REG_DISABLE_TTX_LINE_LO_0,		0x00 },
	{ SAA7127_REG_DISABLE_TTX_LINE_LO_1,		0x00 },
	{ 0, 0 }
};

#define SAA7127_60HZ_DAC_CONTROL 0x15
static const struct i2c_reg_value saa7127_init_config_60hz[] = {
	{ SAA7127_REG_BURST_START,			0x19 },
	/* BURST_END is also used as a chip ID in saa7127_probe */
	{ SAA7127_REG_BURST_END,			0x1d },
	{ SAA7127_REG_CHROMA_PHASE,			0xa3 },
	{ SAA7127_REG_GAINU,				0x98 },
	{ SAA7127_REG_GAINV,				0xd3 },
	{ SAA7127_REG_BLACK_LEVEL,			0x39 },
	{ SAA7127_REG_BLANKING_LEVEL,			0x2e },
	{ SAA7127_REG_VBI_BLANKING,			0x2e },
	{ SAA7127_REG_DAC_CONTROL,			0x15 },
	{ SAA7127_REG_BURST_AMP,			0x4d },
	{ SAA7127_REG_SUBC3,				0x1f },
	{ SAA7127_REG_SUBC2,				0x7c },
	{ SAA7127_REG_SUBC1,				0xf0 },
	{ SAA7127_REG_SUBC0,				0x21 },
	{ SAA7127_REG_MULTI,				0x90 },
	{ SAA7127_REG_CLOSED_CAPTION,			0x11 },
	{ 0, 0 }
};

#define SAA7127_50HZ_PAL_DAC_CONTROL 0x02
static struct i2c_reg_value saa7127_init_config_50hz_pal[] = {
	{ SAA7127_REG_BURST_START,			0x21 },
	/* BURST_END is also used as a chip ID in saa7127_probe */
	{ SAA7127_REG_BURST_END,			0x1d },
	{ SAA7127_REG_CHROMA_PHASE,			0x3f },
	{ SAA7127_REG_GAINU,				0x7d },
	{ SAA7127_REG_GAINV,				0xaf },
	{ SAA7127_REG_BLACK_LEVEL,			0x33 },
	{ SAA7127_REG_BLANKING_LEVEL,			0x35 },
	{ SAA7127_REG_VBI_BLANKING,			0x35 },
	{ SAA7127_REG_DAC_CONTROL,			0x02 },
	{ SAA7127_REG_BURST_AMP,			0x2f },
	{ SAA7127_REG_SUBC3,				0xcb },
	{ SAA7127_REG_SUBC2,				0x8a },
	{ SAA7127_REG_SUBC1,				0x09 },
	{ SAA7127_REG_SUBC0,				0x2a },
	{ SAA7127_REG_MULTI,				0xa0 },
	{ SAA7127_REG_CLOSED_CAPTION,			0x00 },
	{ 0, 0 }
};

Annotation

Implementation Notes