drivers/media/pci/cobalt/cobalt-i2c.c
Source file repositories/reference/linux-study-clean/drivers/media/pci/cobalt/cobalt-i2c.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/media/pci/cobalt/cobalt-i2c.c- Extension
.c- Size
- 8929 bytes
- Lines
- 385
- Domain
- Driver Families
- Bucket
- drivers/media
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
cobalt-driver.hcobalt-i2c.h
Detected Declarations
struct cobalt_i2c_regsfunction cobalt_i2c_regsfunction cobalt_tx_bytesfunction cobalt_rx_bytesfunction cobalt_stopfunction cobalt_xferfunction cobalt_funcfunction cobalt_i2c_initfunction cobalt_i2c_exit
Annotated Snippet
struct cobalt_i2c_regs {
/* Clock prescaler register lo-byte */
u8 prerlo;
u8 dummy0[3];
/* Clock prescaler register high-byte */
u8 prerhi;
u8 dummy1[3];
/* Control register */
u8 ctr;
u8 dummy2[3];
/* Transmit/Receive register */
u8 txr_rxr;
u8 dummy3[3];
/* Command and Status register */
u8 cr_sr;
u8 dummy4[3];
};
/* CTR[7:0] - Control register */
/* I2C Core enable bit */
#define M00018_CTR_BITMAP_EN_MSK (1 << 7)
/* I2C Core interrupt enable bit */
#define M00018_CTR_BITMAP_IEN_MSK (1 << 6)
/* CR[7:0] - Command register */
/* I2C start condition */
#define M00018_CR_BITMAP_STA_MSK (1 << 7)
/* I2C stop condition */
#define M00018_CR_BITMAP_STO_MSK (1 << 6)
/* I2C read from slave */
#define M00018_CR_BITMAP_RD_MSK (1 << 5)
/* I2C write to slave */
#define M00018_CR_BITMAP_WR_MSK (1 << 4)
/* I2C ack */
#define M00018_CR_BITMAP_ACK_MSK (1 << 3)
/* I2C Interrupt ack */
#define M00018_CR_BITMAP_IACK_MSK (1 << 0)
/* SR[7:0] - Status register */
/* Receive acknowledge from slave */
#define M00018_SR_BITMAP_RXACK_MSK (1 << 7)
/* Busy, I2C bus busy (as defined by start / stop bits) */
#define M00018_SR_BITMAP_BUSY_MSK (1 << 6)
/* Arbitration lost - core lost arbitration */
#define M00018_SR_BITMAP_AL_MSK (1 << 5)
/* Transfer in progress */
#define M00018_SR_BITMAP_TIP_MSK (1 << 1)
/* Interrupt flag */
#define M00018_SR_BITMAP_IF_MSK (1 << 0)
/* Frequency, in Hz */
#define I2C_FREQUENCY 400000
#define ALT_CPU_FREQ 83333333
static struct cobalt_i2c_regs __iomem *
cobalt_i2c_regs(struct cobalt *cobalt, unsigned idx)
{
switch (idx) {
case 0:
default:
return (struct cobalt_i2c_regs __iomem *)
(cobalt->bar1 + COBALT_I2C_0_BASE);
case 1:
return (struct cobalt_i2c_regs __iomem *)
(cobalt->bar1 + COBALT_I2C_1_BASE);
case 2:
return (struct cobalt_i2c_regs __iomem *)
(cobalt->bar1 + COBALT_I2C_2_BASE);
case 3:
return (struct cobalt_i2c_regs __iomem *)
(cobalt->bar1 + COBALT_I2C_3_BASE);
case 4:
return (struct cobalt_i2c_regs __iomem *)
(cobalt->bar1 + COBALT_I2C_HSMA_BASE);
}
}
Annotation
- Immediate include surface: `cobalt-driver.h`, `cobalt-i2c.h`.
- Detected declarations: `struct cobalt_i2c_regs`, `function cobalt_i2c_regs`, `function cobalt_tx_bytes`, `function cobalt_rx_bytes`, `function cobalt_stop`, `function cobalt_xfer`, `function cobalt_func`, `function cobalt_i2c_init`, `function cobalt_i2c_exit`.
- Atlas domain: Driver Families / drivers/media.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.