drivers/media/pci/cx18/cx18-gpio.c

Source file repositories/reference/linux-study-clean/drivers/media/pci/cx18/cx18-gpio.c

File Facts

System
Linux kernel
Corpus path
drivers/media/pci/cx18/cx18-gpio.c
Extension
.c
Size
8278 bytes
Lines
323
Domain
Driver Families
Bucket
drivers/media
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 *  cx18 gpio functions
 *
 *  Derived from ivtv-gpio.c
 *
 *  Copyright (C) 2007  Hans Verkuil <hverkuil@kernel.org>
 *  Copyright (C) 2008  Andy Walls <awalls@md.metrocast.net>
 */

#include "cx18-driver.h"
#include "cx18-io.h"
#include "cx18-cards.h"
#include "cx18-gpio.h"
#include "xc2028.h"

/********************* GPIO stuffs *********************/

/* GPIO registers */
#define CX18_REG_GPIO_IN     0xc72010
#define CX18_REG_GPIO_OUT1   0xc78100
#define CX18_REG_GPIO_DIR1   0xc78108
#define CX18_REG_GPIO_OUT2   0xc78104
#define CX18_REG_GPIO_DIR2   0xc7810c

/*
 * HVR-1600 GPIO pins, courtesy of Hauppauge:
 *
 * gpio0: zilog ir process reset pin
 * gpio1: zilog programming pin (you should never use this)
 * gpio12: cx24227 reset pin
 * gpio13: cs5345 reset pin
*/

/*
 * File scope utility functions
 */
static void gpio_write(struct cx18 *cx)
{
	u32 dir_lo = cx->gpio_dir & 0xffff;
	u32 val_lo = cx->gpio_val & 0xffff;
	u32 dir_hi = cx->gpio_dir >> 16;
	u32 val_hi = cx->gpio_val >> 16;

	cx18_write_reg_expect(cx, dir_lo << 16,
					CX18_REG_GPIO_DIR1, ~dir_lo, dir_lo);
	cx18_write_reg_expect(cx, (dir_lo << 16) | val_lo,
					CX18_REG_GPIO_OUT1, val_lo, dir_lo);
	cx18_write_reg_expect(cx, dir_hi << 16,
					CX18_REG_GPIO_DIR2, ~dir_hi, dir_hi);
	cx18_write_reg_expect(cx, (dir_hi << 16) | val_hi,
					CX18_REG_GPIO_OUT2, val_hi, dir_hi);
}

static void gpio_update(struct cx18 *cx, u32 mask, u32 data)
{
	if (mask == 0)
		return;

	mutex_lock(&cx->gpio_lock);
	cx->gpio_val = (cx->gpio_val & ~mask) | (data & mask);
	gpio_write(cx);
	mutex_unlock(&cx->gpio_lock);
}

static void gpio_reset_seq(struct cx18 *cx, u32 active_lo, u32 active_hi,
			   unsigned int assert_msecs,
			   unsigned int recovery_msecs)
{
	u32 mask;

	mask = active_lo | active_hi;
	if (mask == 0)
		return;

	/*
	 * Assuming that active_hi and active_lo are a subsets of the bits in
	 * gpio_dir.  Also assumes that active_lo and active_hi don't overlap
	 * in any bit position
	 */

	/* Assert */
	gpio_update(cx, mask, ~active_lo);
	schedule_timeout_uninterruptible(msecs_to_jiffies(assert_msecs));

	/* Deassert */
	gpio_update(cx, mask, ~active_hi);
	schedule_timeout_uninterruptible(msecs_to_jiffies(recovery_msecs));
}

Annotation

Implementation Notes