drivers/media/pci/cx25821/cx25821-medusa-reg.h
Source file repositories/reference/linux-study-clean/drivers/media/pci/cx25821/cx25821-medusa-reg.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/media/pci/cx25821/cx25821-medusa-reg.h- Extension
.h- Size
- 14966 bytes
- Lines
- 442
- Domain
- Driver Families
- Bucket
- drivers/media
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef __MEDUSA_REGISTERS__
#define __MEDUSA_REGISTERS__
/* Serial Slave Registers */
#define HOST_REGISTER1 0x0000
#define HOST_REGISTER2 0x0001
/* Chip Configuration Registers */
#define CHIP_CTRL 0x0100
#define AFE_AB_CTRL 0x0104
#define AFE_CD_CTRL 0x0108
#define AFE_EF_CTRL 0x010C
#define AFE_GH_CTRL 0x0110
#define DENC_AB_CTRL 0x0114
#define BYP_AB_CTRL 0x0118
#define MON_A_CTRL 0x011C
#define DISP_SEQ_A 0x0120
#define DISP_SEQ_B 0x0124
#define DISP_AB_CNT 0x0128
#define DISP_CD_CNT 0x012C
#define DISP_EF_CNT 0x0130
#define DISP_GH_CNT 0x0134
#define DISP_IJ_CNT 0x0138
#define PIN_OE_CTRL 0x013C
#define PIN_SPD_CTRL 0x0140
#define PIN_SPD_CTRL2 0x0144
#define IRQ_STAT_CTRL 0x0148
#define POWER_CTRL_AB 0x014C
#define POWER_CTRL_CD 0x0150
#define POWER_CTRL_EF 0x0154
#define POWER_CTRL_GH 0x0158
#define TUNE_CTRL 0x015C
#define BIAS_CTRL 0x0160
#define AFE_AB_DIAG_CTRL 0x0164
#define AFE_CD_DIAG_CTRL 0x0168
#define AFE_EF_DIAG_CTRL 0x016C
#define AFE_GH_DIAG_CTRL 0x0170
#define PLL_AB_DIAG_CTRL 0x0174
#define PLL_CD_DIAG_CTRL 0x0178
#define PLL_EF_DIAG_CTRL 0x017C
#define PLL_GH_DIAG_CTRL 0x0180
#define TEST_CTRL 0x0184
#define BIST_STAT 0x0188
#define BIST_STAT2 0x018C
#define BIST_VID_PLL_AB_STAT 0x0190
#define BIST_VID_PLL_CD_STAT 0x0194
#define BIST_VID_PLL_EF_STAT 0x0198
#define BIST_VID_PLL_GH_STAT 0x019C
#define DLL_DIAG_CTRL 0x01A0
#define DEV_CH_ID_CTRL 0x01A4
#define ABIST_CTRL_STATUS 0x01A8
#define ABIST_FREQ 0x01AC
#define ABIST_GOERT_SHIFT 0x01B0
#define ABIST_COEF12 0x01B4
#define ABIST_COEF34 0x01B8
#define ABIST_COEF56 0x01BC
#define ABIST_COEF7_SNR 0x01C0
#define ABIST_ADC_CAL 0x01C4
#define ABIST_BIN1_VGA0 0x01C8
#define ABIST_BIN2_VGA1 0x01CC
#define ABIST_BIN3_VGA2 0x01D0
#define ABIST_BIN4_VGA3 0x01D4
#define ABIST_BIN5_VGA4 0x01D8
#define ABIST_BIN6_VGA5 0x01DC
#define ABIST_BIN7_VGA6 0x01E0
#define ABIST_CLAMP_A 0x01E4
#define ABIST_CLAMP_B 0x01E8
#define ABIST_CLAMP_C 0x01EC
#define ABIST_CLAMP_D 0x01F0
#define ABIST_CLAMP_E 0x01F4
#define ABIST_CLAMP_F 0x01F8
/* Digital Video Encoder A Registers */
#define DENC_A_REG_1 0x0200
#define DENC_A_REG_2 0x0204
#define DENC_A_REG_3 0x0208
#define DENC_A_REG_4 0x020C
#define DENC_A_REG_5 0x0210
#define DENC_A_REG_6 0x0214
#define DENC_A_REG_7 0x0218
#define DENC_A_REG_8 0x021C
/* Digital Video Encoder B Registers */
#define DENC_B_REG_1 0x0300
#define DENC_B_REG_2 0x0304
#define DENC_B_REG_3 0x0308
#define DENC_B_REG_4 0x030C
#define DENC_B_REG_5 0x0310
#define DENC_B_REG_6 0x0314
#define DENC_B_REG_7 0x0318
Annotation
- Atlas domain: Driver Families / drivers/media.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.