drivers/media/pci/intel/ipu6/ipu6-isys-mcd-phy.c

Source file repositories/reference/linux-study-clean/drivers/media/pci/intel/ipu6/ipu6-isys-mcd-phy.c

File Facts

System
Linux kernel
Corpus path
drivers/media/pci/intel/ipu6/ipu6-isys-mcd-phy.c
Extension
.c
Size
20684 bytes
Lines
721
Domain
Driver Families
Bucket
drivers/media
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct phy_reg {
	u32 reg;
	u32 val;
};

static const struct phy_reg common_init_regs[] = {
	/* for TGL-U, use 0x80000000 */
	{0x00000040, 0x80000000},
	{0x00000044, 0x00a80880},
	{0x00000044, 0x00b80880},
	{0x00000010, 0x0000078c},
	{0x00000344, 0x2f4401e2},
	{0x00000544, 0x924401e2},
	{0x00000744, 0x594401e2},
	{0x00000944, 0x624401e2},
	{0x00000b44, 0xfc4401e2},
	{0x00000d44, 0xc54401e2},
	{0x00000f44, 0x034401e2},
	{0x00001144, 0x8f4401e2},
	{0x00001344, 0x754401e2},
	{0x00001544, 0xe94401e2},
	{0x00001744, 0xcb4401e2},
	{0x00001944, 0xfa4401e2}
};

static const struct phy_reg x1_port0_config_regs[] = {
	{0x00000694, 0xc80060fa},
	{0x00000680, 0x3d4f78ea},
	{0x00000690, 0x10a0140b},
	{0x000006a8, 0xdf04010a},
	{0x00000700, 0x57050060},
	{0x00000710, 0x0030001c},
	{0x00000738, 0x5f004444},
	{0x0000073c, 0x78464204},
	{0x00000748, 0x7821f940},
	{0x0000074c, 0xb2000433},
	{0x00000494, 0xfe6030fa},
	{0x00000480, 0x29ef5ed0},
	{0x00000490, 0x10a0540b},
	{0x000004a8, 0x7a01010a},
	{0x00000500, 0xef053460},
	{0x00000510, 0xe030101c},
	{0x00000538, 0xdf808444},
	{0x0000053c, 0xc8422204},
	{0x00000540, 0x0180088c},
	{0x00000574, 0x00000000},
	{0x00000000, 0x00000000}
};

static const struct phy_reg x1_port1_config_regs[] = {
	{0x00000c94, 0xc80060fa},
	{0x00000c80, 0xcf47abea},
	{0x00000c90, 0x10a0840b},
	{0x00000ca8, 0xdf04010a},
	{0x00000d00, 0x57050060},
	{0x00000d10, 0x0030001c},
	{0x00000d38, 0x5f004444},
	{0x00000d3c, 0x78464204},
	{0x00000d48, 0x7821f940},
	{0x00000d4c, 0xb2000433},
	{0x00000a94, 0xc91030fa},
	{0x00000a80, 0x5a166ed0},
	{0x00000a90, 0x10a0540b},
	{0x00000aa8, 0x5d060100},
	{0x00000b00, 0xef053460},
	{0x00000b10, 0xa030101c},
	{0x00000b38, 0xdf808444},
	{0x00000b3c, 0xc8422204},
	{0x00000b40, 0x0180088c},
	{0x00000b74, 0x00000000},
	{0x00000000, 0x00000000}
};

static const struct phy_reg x1_port2_config_regs[] = {
	{0x00001294, 0x28f000fa},
	{0x00001280, 0x08130cea},
	{0x00001290, 0x10a0140b},
	{0x000012a8, 0xd704010a},
	{0x00001300, 0x8d050060},
	{0x00001310, 0x0030001c},
	{0x00001338, 0xdf008444},
	{0x0000133c, 0x78422204},
	{0x00001348, 0x7821f940},
	{0x0000134c, 0x5a000433},
	{0x00001094, 0x2d20b0fa},
	{0x00001080, 0xade75dd0},
	{0x00001090, 0x10a0540b},
	{0x000010a8, 0xb101010a},
	{0x00001100, 0x33053460},
	{0x00001110, 0x0030101c},

Annotation

Implementation Notes