drivers/media/pci/intel/ipu6/ipu6-mmu.c
Source file repositories/reference/linux-study-clean/drivers/media/pci/intel/ipu6/ipu6-mmu.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/media/pci/intel/ipu6/ipu6-mmu.c- Extension
.c- Size
- 20126 bytes
- Lines
- 807
- Domain
- Driver Families
- Bucket
- drivers/media
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
asm/barrier.hlinux/align.hlinux/atomic.hlinux/bitops.hlinux/bits.hlinux/bug.hlinux/cacheflush.hlinux/dma-mapping.hlinux/err.hlinux/gfp.hlinux/io.hlinux/iova.hlinux/math.hlinux/minmax.hlinux/mm.hlinux/pfn.hlinux/slab.hlinux/spinlock.hlinux/types.hlinux/vmalloc.hipu6.hipu6-dma.hipu6-mmu.hipu6-platform-regs.h
Detected Declarations
function Copyrightfunction page_table_dumpfunction map_singlefunction get_dummy_pagefunction free_dummy_pagefunction alloc_dummy_l2_ptfunction free_dummy_l2_ptfunction l2_unmapfunction l2_mapfunction __ipu6_mmu_mapfunction __ipu6_mmu_unmapfunction allocate_trash_bufferfunction ipu6_mmu_hw_initfunction ipu6_mmu_hw_cleanupfunction ipu6_mmu_iova_to_physfunction ipu6_mmu_unmapfunction alignedfunction ipu6_mmu_mapfunction ipu6_mmu_destroyfunction ipu6_mmu_cleanup
Annotated Snippet
if (mmu_info->l1_pt[l1_idx] == mmu_info->dummy_l2_pteval) {
dev_err(mmu_info->dev,
"unmap not mapped iova 0x%8.8lx l1 index %u\n",
iova, l1_idx);
continue;
}
l2_pt = mmu_info->l2_pts[l1_idx];
l2_entries = 0;
for (l2_idx = (iova & ISP_L2PT_MASK) >> ISP_L2PT_SHIFT;
size > 0 && l2_idx < ISP_L2PT_PTES; l2_idx++) {
phys_addr_t pteval = TBL_PHYS_ADDR(l2_pt[l2_idx]);
dev_dbg(mmu_info->dev,
"unmap l2 index %u with pteval 0x%p\n",
l2_idx, &pteval);
l2_pt[l2_idx] = mmu_info->dummy_page_pteval;
iova += ISP_PAGE_SIZE;
size -= ISP_PAGE_SIZE;
l2_entries++;
}
WARN_ON_ONCE(!l2_entries);
clflush_cache_range(&l2_pt[l2_idx - l2_entries],
sizeof(l2_pt[0]) * l2_entries);
}
WARN_ON_ONCE(size);
spin_unlock_irqrestore(&mmu_info->lock, flags);
}
static int l2_map(struct ipu6_mmu_info *mmu_info, unsigned long iova,
phys_addr_t paddr, size_t size)
{
struct device *dev = mmu_info->dev;
unsigned int l2_entries;
u32 *l2_pt, *l2_virt;
unsigned int l2_idx;
unsigned long flags;
size_t mapped = 0;
dma_addr_t dma;
u32 l1_entry;
u32 l1_idx;
int err = 0;
spin_lock_irqsave(&mmu_info->lock, flags);
paddr = ALIGN(paddr, ISP_PAGE_SIZE);
for (l1_idx = iova >> ISP_L1PT_SHIFT;
size > 0 && l1_idx < ISP_L1PT_PTES; l1_idx++) {
dev_dbg(dev,
"mapping l2 page table for l1 index %u (iova %8.8x)\n",
l1_idx, (u32)iova);
l1_entry = mmu_info->l1_pt[l1_idx];
if (l1_entry == mmu_info->dummy_l2_pteval) {
l2_virt = mmu_info->l2_pts[l1_idx];
if (likely(!l2_virt)) {
l2_virt = alloc_l2_pt(mmu_info);
if (!l2_virt) {
err = -ENOMEM;
goto error;
}
}
dma = map_single(mmu_info, l2_virt);
if (!dma) {
dev_err(dev, "Failed to map l2pt page\n");
free_page((unsigned long)l2_virt);
err = -EINVAL;
goto error;
}
l1_entry = dma >> ISP_PADDR_SHIFT;
dev_dbg(dev, "page for l1_idx %u %p allocated\n",
l1_idx, l2_virt);
mmu_info->l1_pt[l1_idx] = l1_entry;
mmu_info->l2_pts[l1_idx] = l2_virt;
clflush_cache_range(&mmu_info->l1_pt[l1_idx],
sizeof(mmu_info->l1_pt[l1_idx]));
}
l2_pt = mmu_info->l2_pts[l1_idx];
l2_entries = 0;
for (l2_idx = (iova & ISP_L2PT_MASK) >> ISP_L2PT_SHIFT;
Annotation
- Immediate include surface: `asm/barrier.h`, `linux/align.h`, `linux/atomic.h`, `linux/bitops.h`, `linux/bits.h`, `linux/bug.h`, `linux/cacheflush.h`, `linux/dma-mapping.h`.
- Detected declarations: `function Copyright`, `function page_table_dump`, `function map_single`, `function get_dummy_page`, `function free_dummy_page`, `function alloc_dummy_l2_pt`, `function free_dummy_l2_pt`, `function l2_unmap`, `function l2_map`, `function __ipu6_mmu_map`.
- Atlas domain: Driver Families / drivers/media.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.