drivers/media/platform/allegro-dvt/allegro-core.c
Source file repositories/reference/linux-study-clean/drivers/media/platform/allegro-dvt/allegro-core.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/media/platform/allegro-dvt/allegro-core.c- Extension
.c- Size
- 114302 bytes
- Lines
- 4087
- Domain
- Driver Families
- Bucket
- drivers/media
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bits.hlinux/clk.hlinux/firmware.hlinux/gcd.hlinux/interrupt.hlinux/io.hlinux/kernel.hlinux/log2.hlinux/mfd/syscon.hlinux/mfd/syscon/xlnx-vcu.hlinux/module.hlinux/of.hlinux/platform_device.hlinux/pm_runtime.hlinux/regmap.hlinux/sizes.hlinux/slab.hlinux/videodev2.hmedia/v4l2-ctrls.hmedia/v4l2-device.hmedia/v4l2-event.hmedia/v4l2-ioctl.hmedia/v4l2-mem2mem.hmedia/videobuf2-dma-contig.hmedia/videobuf2-v4l2.hallegro-mail.hnal-h264.hnal-hevc.h
Detected Declarations
struct allegro_bufferstruct allegro_devstruct allegro_channelstruct allegro_mboxstruct allegro_encoder_bufferstruct allegro_devstruct allegro_channelstruct allegro_m2m_bufferstruct fw_infofunction Copyrightfunction allegro_channel_get_i_frame_qpfunction allegro_channel_get_p_frame_qpfunction allegro_channel_get_b_frame_qpfunction allegro_channel_get_min_qpfunction allegro_channel_get_max_qpfunction to_mcu_addrfunction to_mcu_sizefunction to_codec_addrfunction ptr_to_u64function allegro_next_user_idfunction allegro_ref_get_channel_by_user_idfunction list_for_each_entryfunction allegro_ref_get_channel_by_channel_idfunction list_for_each_entryfunction allegro_free_channelfunction allegro_ref_put_channelfunction channel_existsfunction estimate_stream_sizefunction select_minimum_h264_levelfunction h264_maximum_bitratefunction h264_maximum_cpb_sizefunction select_minimum_hevc_levelfunction hevc_maximum_bitratefunction hevc_maximum_cpb_sizefunction allegro_get_firmware_infofunction allegro_alloc_bufferfunction allegro_free_bufferfunction allegro_mbox_writefunction allegro_mbox_get_availablefunction allegro_mbox_readfunction allegro_mbox_sendfunction allegro_mbox_notifyfunction allegro_encoder_buffer_initfunction allegro_mcu_send_initfunction v4l2_pixelformat_to_mcu_formatfunction v4l2_colorspace_to_mcu_colorspacefunction v4l2_profile_to_mcu_profilefunction v4l2_level_to_mcu_level
Annotated Snippet
struct allegro_buffer {
void *vaddr;
dma_addr_t paddr;
size_t size;
struct list_head head;
};
struct allegro_dev;
struct allegro_channel;
struct allegro_mbox {
struct allegro_dev *dev;
unsigned int head;
unsigned int tail;
unsigned int data;
size_t size;
/* protect mailbox from simultaneous accesses */
struct mutex lock;
};
struct allegro_encoder_buffer {
unsigned int size;
unsigned int color_depth;
unsigned int num_cores;
unsigned int clk_rate;
};
struct allegro_dev {
struct v4l2_device v4l2_dev;
struct video_device video_dev;
struct v4l2_m2m_dev *m2m_dev;
struct platform_device *plat_dev;
/* mutex protecting vb2_queue structure */
struct mutex lock;
struct regmap *regmap;
struct regmap *sram;
struct regmap *settings;
struct clk *clk_core;
struct clk *clk_mcu;
const struct fw_info *fw_info;
struct allegro_buffer firmware;
struct allegro_buffer suballocator;
bool has_encoder_buffer;
struct allegro_encoder_buffer encoder_buffer;
struct completion init_complete;
bool initialized;
/* The mailbox interface */
struct allegro_mbox *mbox_command;
struct allegro_mbox *mbox_status;
/*
* The downstream driver limits the users to 64 users, thus I can use
* a bitfield for the user_ids that are in use. See also user_id in
* struct allegro_channel.
*/
unsigned long channel_user_ids;
struct list_head channels;
struct mutex channels_lock;
};
static const struct regmap_config allegro_regmap_config = {
.name = "regmap",
.reg_bits = 32,
.val_bits = 32,
.reg_stride = 4,
.max_register = 0xfff,
.cache_type = REGCACHE_NONE,
};
static const struct regmap_config allegro_sram_config = {
.name = "sram",
.reg_bits = 32,
.val_bits = 32,
.reg_stride = 4,
.max_register = 0x7fff,
.cache_type = REGCACHE_NONE,
};
struct allegro_channel {
struct kref ref;
struct allegro_dev *dev;
struct v4l2_fh fh;
struct v4l2_ctrl_handler ctrl_handler;
Annotation
- Immediate include surface: `linux/bits.h`, `linux/clk.h`, `linux/firmware.h`, `linux/gcd.h`, `linux/interrupt.h`, `linux/io.h`, `linux/kernel.h`, `linux/log2.h`.
- Detected declarations: `struct allegro_buffer`, `struct allegro_dev`, `struct allegro_channel`, `struct allegro_mbox`, `struct allegro_encoder_buffer`, `struct allegro_dev`, `struct allegro_channel`, `struct allegro_m2m_buffer`, `struct fw_info`, `function Copyright`.
- Atlas domain: Driver Families / drivers/media.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.