drivers/media/platform/allegro-dvt/allegro-mail.c
Source file repositories/reference/linux-study-clean/drivers/media/platform/allegro-dvt/allegro-mail.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/media/platform/allegro-dvt/allegro-mail.c- Extension
.c- Size
- 15166 bytes
- Lines
- 550
- Domain
- Driver Families
- Bucket
- drivers/media
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/export.hlinux/errno.hlinux/string.hlinux/videodev2.hallegro-mail.h
Detected Declarations
function Copyrightfunction allegro_enc_initfunction settings_get_mcu_codecfunction allegro_encode_config_blobfunction allegro_enc_create_channelfunction allegro_decode_config_blobfunction allegro_enc_destroy_channelfunction allegro_enc_push_buffersfunction allegro_enc_put_stream_bufferfunction allegro_enc_encode_framefunction allegro_dec_initfunction allegro_dec_create_channelfunction allegro_decode_config_blobfunction allegro_dec_destroy_channelfunction allegro_dec_encode_framefunction allegro_encode_mailfunction allegro_decode_mailexport msg_type_name
Annotated Snippet
switch (pixelformat) {
case V4L2_PIX_FMT_HEVC:
return 2;
case V4L2_PIX_FMT_H264:
default:
return 1;
}
} else {
switch (pixelformat) {
case V4L2_PIX_FMT_HEVC:
return 1;
case V4L2_PIX_FMT_H264:
default:
return 0;
}
}
}
ssize_t
allegro_encode_config_blob(u32 *dst, struct create_channel_param *param)
{
enum mcu_msg_version version = param->version;
unsigned int i = 0;
unsigned int j = 0;
u32 val;
unsigned int codec = settings_get_mcu_codec(param);
if (version >= MCU_MSG_VERSION_2019_2)
dst[i++] = param->layer_id;
dst[i++] = FIELD_PREP(GENMASK(31, 16), param->height) |
FIELD_PREP(GENMASK(15, 0), param->width);
if (version >= MCU_MSG_VERSION_2019_2)
dst[i++] = param->videomode;
dst[i++] = param->format;
if (version < MCU_MSG_VERSION_2019_2)
dst[i++] = param->colorspace;
dst[i++] = param->src_mode;
if (version >= MCU_MSG_VERSION_2019_2)
dst[i++] = param->src_bit_depth;
dst[i++] = FIELD_PREP(GENMASK(31, 24), codec) |
FIELD_PREP(GENMASK(23, 8), param->constraint_set_flags) |
FIELD_PREP(GENMASK(7, 0), param->profile);
dst[i++] = FIELD_PREP(GENMASK(31, 16), param->tier) |
FIELD_PREP(GENMASK(15, 0), param->level);
val = 0;
val |= param->temporal_mvp_enable ? BIT(20) : 0;
val |= FIELD_PREP(GENMASK(7, 4), param->log2_max_frame_num);
if (version >= MCU_MSG_VERSION_2019_2)
val |= FIELD_PREP(GENMASK(3, 0), param->log2_max_poc - 1);
else
val |= FIELD_PREP(GENMASK(3, 0), param->log2_max_poc);
dst[i++] = val;
val = 0;
val |= param->enable_reordering ? BIT(0) : 0;
val |= param->dbf_ovr_en ? BIT(2) : 0;
val |= param->override_lf ? BIT(12) : 0;
dst[i++] = val;
if (version >= MCU_MSG_VERSION_2019_2) {
val = 0;
val |= param->custom_lda ? BIT(2) : 0;
val |= param->rdo_cost_mode ? BIT(20) : 0;
dst[i++] = val;
val = 0;
val |= param->lf ? BIT(2) : 0;
val |= param->lf_x_tile ? BIT(3) : 0;
val |= param->lf_x_slice ? BIT(4) : 0;
dst[i++] = val;
} else {
val = 0;
dst[i++] = val;
}
dst[i++] = FIELD_PREP(GENMASK(15, 8), param->beta_offset) |
FIELD_PREP(GENMASK(7, 0), param->tc_offset);
dst[i++] = param->unknown11;
dst[i++] = param->unknown12;
dst[i++] = param->num_slices;
dst[i++] = param->encoder_buffer_offset;
dst[i++] = param->encoder_buffer_enabled;
dst[i++] = FIELD_PREP(GENMASK(31, 16), param->clip_vrt_range) |
FIELD_PREP(GENMASK(15, 0), param->clip_hrz_range);
dst[i++] = FIELD_PREP(GENMASK(31, 16), param->me_range[1]) |
FIELD_PREP(GENMASK(15, 0), param->me_range[0]);
dst[i++] = FIELD_PREP(GENMASK(31, 16), param->me_range[3]) |
FIELD_PREP(GENMASK(15, 0), param->me_range[2]);
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/export.h`, `linux/errno.h`, `linux/string.h`, `linux/videodev2.h`, `allegro-mail.h`.
- Detected declarations: `function Copyright`, `function allegro_enc_init`, `function settings_get_mcu_codec`, `function allegro_encode_config_blob`, `function allegro_enc_create_channel`, `function allegro_decode_config_blob`, `function allegro_enc_destroy_channel`, `function allegro_enc_push_buffers`, `function allegro_enc_put_stream_buffer`, `function allegro_enc_encode_frame`.
- Atlas domain: Driver Families / drivers/media.
- Implementation status: integration implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.