drivers/media/platform/amlogic/c3/isp/c3-isp-params.c

Source file repositories/reference/linux-study-clean/drivers/media/platform/amlogic/c3/isp/c3-isp-params.c

File Facts

System
Linux kernel
Corpus path
drivers/media/platform/amlogic/c3/isp/c3-isp-params.c
Extension
.c
Size
30994 bytes
Lines
935
Domain
Driver Families
Bucket
drivers/media
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (ARRAY_SIZE(gm->lut) % 2) {
			base = i * 2;
			c3_isp_write(isp, ISP_PST_GAMMA_LUT_DATA,
				     ISP_PST_GM_LUT_DATA0(gm->lut[base]));
		}
	}

	if (block->header.flags & C3_ISP_PARAMS_BLOCK_FL_ENABLE)
		c3_isp_update_bits(isp, ISP_TOP_BED_CTRL,
				   ISP_TOP_BED_CTRL_PST_GAMMA_EN_MASK,
				   ISP_TOP_BED_CTRL_PST_GAMMA_EN);
}

/* Configure 3 x 3 ccm matrix */
static void c3_isp_params_cfg_ccm(struct c3_isp_device *isp,
				  const union c3_isp_params_block *block)
{
	const struct c3_isp_params_ccm *ccm = &block->ccm;

	if (block->header.flags & C3_ISP_PARAMS_BLOCK_FL_DISABLE) {
		c3_isp_update_bits(isp, ISP_TOP_BED_CTRL,
				   ISP_TOP_BED_CTRL_CCM_EN_MASK,
				   ISP_TOP_BED_CTRL_CCM_DIS);
		return;
	}

	c3_isp_update_bits(isp, ISP_CCM_MTX_00_01,
			   ISP_CCM_MTX_00_01_MTX_00_MASK,
			   ISP_CCM_MTX_00_01_MTX_00(ccm->matrix[0][0]));
	c3_isp_update_bits(isp, ISP_CCM_MTX_00_01,
			   ISP_CCM_MTX_00_01_MTX_01_MASK,
			   ISP_CCM_MTX_00_01_MTX_01(ccm->matrix[0][1]));
	c3_isp_update_bits(isp, ISP_CCM_MTX_02_03,
			   ISP_CCM_MTX_02_03_MTX_02_MASK,
			   ISP_CCM_MTX_02_03_MTX_02(ccm->matrix[0][2]));

	c3_isp_update_bits(isp, ISP_CCM_MTX_10_11,
			   ISP_CCM_MTX_10_11_MTX_10_MASK,
			   ISP_CCM_MTX_10_11_MTX_10(ccm->matrix[1][0]));
	c3_isp_update_bits(isp, ISP_CCM_MTX_10_11,
			   ISP_CCM_MTX_10_11_MTX_11_MASK,
			   ISP_CCM_MTX_10_11_MTX_11(ccm->matrix[1][1]));
	c3_isp_update_bits(isp, ISP_CCM_MTX_12_13,
			   ISP_CCM_MTX_12_13_MTX_12_MASK,
			   ISP_CCM_MTX_12_13_MTX_12(ccm->matrix[1][2]));

	c3_isp_update_bits(isp, ISP_CCM_MTX_20_21,
			   ISP_CCM_MTX_20_21_MTX_20_MASK,
			   ISP_CCM_MTX_20_21_MTX_20(ccm->matrix[2][0]));
	c3_isp_update_bits(isp, ISP_CCM_MTX_20_21,
			   ISP_CCM_MTX_20_21_MTX_21_MASK,
			   ISP_CCM_MTX_20_21_MTX_21(ccm->matrix[2][1]));
	c3_isp_update_bits(isp, ISP_CCM_MTX_22_23_RS,
			   ISP_CCM_MTX_22_23_RS_MTX_22_MASK,
			   ISP_CCM_MTX_22_23_RS_MTX_22(ccm->matrix[2][2]));

	if (block->header.flags & C3_ISP_PARAMS_BLOCK_FL_ENABLE)
		c3_isp_update_bits(isp, ISP_TOP_BED_CTRL,
				   ISP_TOP_BED_CTRL_CCM_EN_MASK,
				   ISP_TOP_BED_CTRL_CCM_EN);
}

/* Configure color space conversion matrix parameters */
static void c3_isp_params_cfg_csc(struct c3_isp_device *isp,
				  const union c3_isp_params_block *block)
{
	const struct c3_isp_params_csc *csc = &block->csc;

	if (block->header.flags & C3_ISP_PARAMS_BLOCK_FL_DISABLE) {
		c3_isp_update_bits(isp, ISP_TOP_BED_CTRL,
				   ISP_TOP_BED_CTRL_CM0_EN_MASK,
				   ISP_TOP_BED_CTRL_CM0_DIS);
		return;
	}

	c3_isp_update_bits(isp, ISP_CM0_COEF00_01,
			   ISP_CM0_COEF00_01_MTX_00_MASK,
			   ISP_CM0_COEF00_01_MTX_00(csc->matrix[0][0]));
	c3_isp_update_bits(isp, ISP_CM0_COEF00_01,
			   ISP_CM0_COEF00_01_MTX_01_MASK,
			   ISP_CM0_COEF00_01_MTX_01(csc->matrix[0][1]));
	c3_isp_update_bits(isp, ISP_CM0_COEF02_10,
			   ISP_CM0_COEF02_10_MTX_02_MASK,
			   ISP_CM0_COEF02_10_MTX_02(csc->matrix[0][2]));

	c3_isp_update_bits(isp, ISP_CM0_COEF02_10,
			   ISP_CM0_COEF02_10_MTX_10_MASK,
			   ISP_CM0_COEF02_10_MTX_10(csc->matrix[1][0]));
	c3_isp_update_bits(isp, ISP_CM0_COEF11_12,
			   ISP_CM0_COEF11_12_MTX_11_MASK,

Annotation

Implementation Notes