drivers/media/platform/amphion/vpu_core.h

File Facts

System

Linux kernel

Corpus path

drivers/media/platform/amphion/vpu_core.h

Extension

.h

Size

503 bytes

Lines

17

Domain

Driver Families

Bucket

drivers/media

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef _AMPHION_VPU_CORE_H
#define _AMPHION_VPU_CORE_H

void csr_writel(struct vpu_core *core, u32 reg, u32 val);
u32 csr_readl(struct vpu_core *core, u32 reg);
int vpu_alloc_dma(struct vpu_core *core, struct vpu_buffer *buf);
void vpu_free_dma(struct vpu_buffer *buf);
struct vpu_inst *vpu_core_find_instance(struct vpu_core *core, u32 index);
void vpu_core_set_state(struct vpu_core *core, enum vpu_core_state state);

#endif

Annotation

• Atlas domain: Driver Families / drivers/media.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.