drivers/media/platform/amphion/vpu_imx8q.h

Source file repositories/reference/linux-study-clean/drivers/media/platform/amphion/vpu_imx8q.h

File Facts

System
Linux kernel
Corpus path
drivers/media/platform/amphion/vpu_imx8q.h
Extension
.h
Size
4100 bytes
Lines
116
Domain
Driver Families
Bucket
drivers/media
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct vpu_rpc_system_config {
	u32 cfg_cookie;

	u32 num_malones;
	u32 malone_base_addr[MEDIAIP_MAX_NUM_MALONES];
	u32 hif_offset[MEDIAIP_MAX_NUM_MALONES];
	u32 malone_irq_pin[MEDIAIP_MAX_NUM_MALONES][MEDIAIP_MAX_NUM_MALONE_IRQ_PINS];
	u32 malone_irq_target[MEDIAIP_MAX_NUM_MALONES][MEDIAIP_MAX_NUM_MALONE_IRQ_PINS];

	u32 num_windsors;
	u32 windsor_base_addr[MEDIAIP_MAX_NUM_WINDSORS];
	u32 windsor_irq_pin[MEDIAIP_MAX_NUM_WINDSORS][MEDIAIP_MAX_NUM_WINDSOR_IRQ_PINS];
	u32 windsor_irq_target[MEDIAIP_MAX_NUM_WINDSORS][MEDIAIP_MAX_NUM_WINDSOR_IRQ_PINS];

	u32 cmd_irq_pin[MEDIAIP_MAX_NUM_CMD_IRQ_PINS];
	u32 cmd_irq_target[MEDIAIP_MAX_NUM_CMD_IRQ_PINS];

	u32 msg_irq_pin[MEDIAIP_MAX_NUM_MSG_IRQ_PINS];
	u32 msg_irq_target[MEDIAIP_MAX_NUM_MSG_IRQ_PINS];

	u32 sys_clk_freq;
	u32 num_timers;
	u32 timer_base_addr;
	u32 timer_irq_pin[MEDIAIP_MAX_NUM_TIMER_IRQ_PINS];
	u32 timer_irq_target[MEDIAIP_MAX_NUM_TIMER_IRQ_PINS];
	u32 timer_slots[MEDIAIP_MAX_NUM_TIMER_IRQ_SLOTS];

	u32 gic_base_addr;
	u32 uart_base_addr;

	u32 dpv_base_addr;
	u32 dpv_irq_pin;
	u32 dpv_irq_target;

	u32 pixif_base_addr;

	u32 pal_trace_level;
	u32 pal_trace_destination;

	u32 pal_trace_level1;
	u32 pal_trace_destination1;

	u32 heap_base;
	u32 heap_size;

	u32 cache_base_addr[2];
};

int vpu_imx8q_setup_dec(struct vpu_dev *vpu);
int vpu_imx8q_setup_enc(struct vpu_dev *vpu);
int vpu_imx8q_setup(struct vpu_dev *vpu);
int vpu_imx8q_reset(struct vpu_dev *vpu);
int vpu_imx8q_set_system_cfg_common(struct vpu_rpc_system_config *config, u32 regs, u32 core_id);
int vpu_imx8q_boot_core(struct vpu_core *core);
int vpu_imx8q_get_power_state(struct vpu_core *core);
int vpu_imx8q_on_firmware_loaded(struct vpu_core *core);
int vpu_imx8q_check_memory_region(dma_addr_t base, dma_addr_t addr, u32 size);
bool vpu_imx8q_check_codec(enum vpu_core_type type);
bool vpu_imx8q_check_fmt(enum vpu_core_type type, u32 pixelfmt);

#endif

Annotation

Implementation Notes