drivers/media/platform/arm/mali-c55/mali-c55-registers.h

Source file repositories/reference/linux-study-clean/drivers/media/platform/arm/mali-c55/mali-c55-registers.h

File Facts

System
Linux kernel
Corpus path
drivers/media/platform/arm/mali-c55/mali-c55-registers.h
Extension
.h
Size
18946 bytes
Lines
450
Domain
Driver Families
Bucket
drivers/media
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _MALI_C55_REGISTERS_H
#define _MALI_C55_REGISTERS_H

#include <linux/bits.h>

/* ISP Common 0x00000 - 0x000ff */

#define MALI_C55_REG_API				0x00000
#define MALI_C55_REG_PRODUCT				0x00004
#define MALI_C55_REG_VERSION				0x00008
#define MALI_C55_REG_REVISION				0x0000c
#define MALI_C55_REG_PULSE_MODE				0x0003c
#define MALI_C55_REG_INPUT_MODE_REQUEST			0x0009c
#define MALI_C55_INPUT_SAFE_STOP			0x00
#define MALI_C55_INPUT_SAFE_START			0x01
#define MALI_C55_REG_MODE_STATUS			0x000a0
#define MALI_C55_REG_INTERRUPT_MASK_VECTOR		0x00030
#define MALI_C55_INTERRUPT_MASK_ALL			GENMASK(31, 0)

#define MALI_C55_REG_GLOBAL_MONITOR			0x00050

#define MALI_C55_REG_GEN_VIDEO				0x00080
#define MALI_C55_REG_GEN_VIDEO_ON_MASK			BIT(0)
#define MALI_C55_REG_GEN_VIDEO_MULTI_MASK		BIT(1)
#define MALI_C55_REG_GEN_PREFETCH_MASK			GENMASK(31, 16)

#define MALI_C55_REG_MCU_CONFIG				0x00020
#define MALI_C55_REG_MCU_CONFIG_OVERRIDE_MASK		BIT(0)
#define MALI_C55_REG_MCU_CONFIG_WRITE_MASK		BIT(1)
#define MALI_C55_MCU_CONFIG_WRITE(x)			((x) << 1)
#define MALI_C55_REG_MCU_CONFIG_WRITE_PING		BIT(1)
#define MALI_C55_REG_MCU_CONFIG_WRITE_PONG		0x00
#define MALI_C55_REG_MULTI_CONTEXT_MODE_MASK		BIT(8)
#define MALI_C55_REG_PING_PONG_READ			0x00024
#define MALI_C55_REG_PING_PONG_READ_MASK		BIT(2)

#define MALI_C55_REG_INTERRUPT_CLEAR_VECTOR		0x00034
#define MALI_C55_REG_INTERRUPT_CLEAR			0x00040
#define MALI_C55_REG_INTERRUPT_STATUS_VECTOR		0x00044

enum mali_c55_interrupts {
	MALI_C55_IRQ_ISP_START,
	MALI_C55_IRQ_ISP_DONE,
	MALI_C55_IRQ_MCM_ERROR,
	MALI_C55_IRQ_BROKEN_FRAME_ERROR,
	MALI_C55_IRQ_MET_AF_DONE,
	MALI_C55_IRQ_MET_AEXP_DONE,
	MALI_C55_IRQ_MET_AWB_DONE,
	MALI_C55_IRQ_AEXP_1024_DONE,
	MALI_C55_IRQ_IRIDIX_MET_DONE,
	MALI_C55_IRQ_LUT_INIT_DONE,
	MALI_C55_IRQ_FR_Y_DONE,
	MALI_C55_IRQ_FR_UV_DONE,
	MALI_C55_IRQ_DS_Y_DONE,
	MALI_C55_IRQ_DS_UV_DONE,
	MALI_C55_IRQ_LINEARIZATION_DONE,
	MALI_C55_IRQ_RAW_FRONTEND_DONE,
	MALI_C55_IRQ_NOISE_REDUCTION_DONE,
	MALI_C55_IRQ_IRIDIX_DONE,
	MALI_C55_IRQ_BAYER2RGB_DONE,
	MALI_C55_IRQ_WATCHDOG_TIMER,
	MALI_C55_IRQ_FRAME_COLLISION,
	MALI_C55_IRQ_UNUSED,
	MALI_C55_IRQ_DMA_ERROR,
	MALI_C55_IRQ_INPUT_STOPPED,
	MALI_C55_IRQ_MET_AWB_TARGET1_HIT,
	MALI_C55_IRQ_MET_AWB_TARGET2_HIT,
	MALI_C55_NUM_IRQ_BITS
};

#define MALI_C55_INTERRUPT_BIT(x)			BIT(x)

#define MALI_C55_REG_GLOBAL_PARAMETER_STATUS		0x00068
#define MALI_C55_GPS_PONG_FITTED			BIT(0)
#define MALI_C55_GPS_WDR_FITTED				BIT(1)
#define MALI_C55_GPS_COMPRESSION_FITTED			BIT(2)
#define MALI_C55_GPS_TEMPER_FITTED			BIT(3)
#define MALI_C55_GPS_SINTER_LITE_FITTED			BIT(4)
#define MALI_C55_GPS_SINTER_FITTED			BIT(5)
#define MALI_C55_GPS_IRIDIX_LTM_FITTED			BIT(6)
#define MALI_C55_GPS_IRIDIX_GTM_FITTED			BIT(7)
#define MALI_C55_GPS_CNR_FITTED				BIT(8)
#define MALI_C55_GPS_FRSCALER_FITTED			BIT(9)
#define MALI_C55_GPS_DS_PIPE_FITTED			BIT(10)

#define MALI_C55_REG_BLANKING				0x00084
#define MALI_C55_REG_HBLANK_MASK			GENMASK(15, 0)
#define MALI_C55_REG_VBLANK_MASK			GENMASK(31, 16)
#define MALI_C55_VBLANK(x)				((x) << 16)

Annotation

Implementation Notes