drivers/media/platform/chips-media/coda/coda_regs.h
Source file repositories/reference/linux-study-clean/drivers/media/platform/chips-media/coda/coda_regs.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/media/platform/chips-media/coda/coda_regs.h- Extension
.h- Size
- 23474 bytes
- Lines
- 564
- Domain
- Driver Families
- Bucket
- drivers/media
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _REGS_CODA_H_
#define _REGS_CODA_H_
/* HW registers */
#define CODA_REG_BIT_CODE_RUN 0x000
#define CODA_REG_RUN_ENABLE (1 << 0)
#define CODA_REG_BIT_CODE_DOWN 0x004
#define CODA_DOWN_ADDRESS_SET(x) (((x) & 0xffff) << 16)
#define CODA_DOWN_DATA_SET(x) ((x) & 0xffff)
#define CODA_REG_BIT_HOST_IN_REQ 0x008
#define CODA_REG_BIT_INT_CLEAR 0x00c
#define CODA_REG_BIT_INT_CLEAR_SET 0x1
#define CODA_REG_BIT_INT_STATUS 0x010
#define CODA_REG_BIT_CODE_RESET 0x014
#define CODA_REG_RESET_ENABLE (1 << 0)
#define CODA_REG_BIT_CUR_PC 0x018
#define CODA9_REG_BIT_SW_RESET 0x024
#define CODA9_SW_RESET_BPU_CORE 0x008
#define CODA9_SW_RESET_BPU_BUS 0x010
#define CODA9_SW_RESET_VCE_CORE 0x020
#define CODA9_SW_RESET_VCE_BUS 0x040
#define CODA9_SW_RESET_GDI_CORE 0x080
#define CODA9_SW_RESET_GDI_BUS 0x100
#define CODA9_REG_BIT_SW_RESET_STATUS 0x034
/* Static SW registers */
#define CODA_REG_BIT_CODE_BUF_ADDR 0x100
#define CODA_REG_BIT_WORK_BUF_ADDR 0x104
#define CODA_REG_BIT_PARA_BUF_ADDR 0x108
#define CODA_REG_BIT_STREAM_CTRL 0x10c
#define CODA7_STREAM_BUF_PIC_RESET (1 << 4)
#define CODADX6_STREAM_BUF_PIC_RESET (1 << 3)
#define CODA7_STREAM_BUF_PIC_FLUSH (1 << 3)
#define CODADX6_STREAM_BUF_PIC_FLUSH (1 << 2)
#define CODA7_STREAM_BUF_DYNALLOC_EN (1 << 5)
#define CODADX6_STREAM_BUF_DYNALLOC_EN (1 << 4)
#define CODADX6_STREAM_CHKDIS_OFFSET (1 << 1)
#define CODA7_STREAM_SEL_64BITS_ENDIAN (1 << 1)
#define CODA_STREAM_ENDIAN_SELECT (1 << 0)
#define CODA_REG_BIT_FRAME_MEM_CTRL 0x110
#define CODA9_FRAME_ENABLE_BWB (1 << 12)
#define CODA9_FRAME_TILED2LINEAR (1 << 11)
#define CODA_FRAME_CHROMA_INTERLEAVE (1 << 2)
#define CODA_IMAGE_ENDIAN_SELECT (1 << 0)
#define CODA_REG_BIT_BIT_STREAM_PARAM 0x114
#define CODA_BIT_STREAM_END_FLAG (1 << 2)
#define CODA_BIT_DEC_SEQ_INIT_ESCAPE (1 << 0)
#define CODA_REG_BIT_TEMP_BUF_ADDR 0x118
#define CODA_REG_BIT_RD_PTR(x) (0x120 + 8 * (x))
#define CODA_REG_BIT_WR_PTR(x) (0x124 + 8 * (x))
#define CODA_REG_BIT_FRM_DIS_FLG(x) (0x150 + 4 * (x))
#define CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR 0x140
#define CODA7_REG_BIT_AXI_SRAM_USE 0x140
#define CODA9_USE_HOST_BTP_ENABLE (1 << 13)
#define CODA9_USE_HOST_OVL_ENABLE (1 << 12)
#define CODA7_USE_HOST_ME_ENABLE (1 << 11)
#define CODA9_USE_HOST_DBK_ENABLE (3 << 10)
#define CODA7_USE_HOST_OVL_ENABLE (1 << 10)
#define CODA7_USE_HOST_DBK_ENABLE (1 << 9)
#define CODA9_USE_HOST_IP_ENABLE (1 << 9)
#define CODA7_USE_HOST_IP_ENABLE (1 << 8)
#define CODA9_USE_HOST_BIT_ENABLE (1 << 8)
#define CODA7_USE_HOST_BIT_ENABLE (1 << 7)
#define CODA9_USE_BTP_ENABLE (1 << 5)
#define CODA7_USE_ME_ENABLE (1 << 4)
#define CODA9_USE_OVL_ENABLE (1 << 4)
#define CODA7_USE_OVL_ENABLE (1 << 3)
#define CODA9_USE_DBK_ENABLE (3 << 2)
#define CODA7_USE_DBK_ENABLE (1 << 2)
#define CODA7_USE_IP_ENABLE (1 << 1)
#define CODA7_USE_BIT_ENABLE (1 << 0)
#define CODA_REG_BIT_BUSY 0x160
#define CODA_REG_BIT_BUSY_FLAG 1
#define CODA_REG_BIT_RUN_COMMAND 0x164
#define CODA_COMMAND_SEQ_INIT 1
#define CODA_COMMAND_SEQ_END 2
#define CODA_COMMAND_PIC_RUN 3
#define CODA_COMMAND_SET_FRAME_BUF 4
#define CODA_COMMAND_ENCODE_HEADER 5
#define CODA_COMMAND_ENC_PARA_SET 6
#define CODA_COMMAND_DEC_PARA_SET 7
#define CODA_COMMAND_DEC_BUF_FLUSH 8
#define CODA_COMMAND_RC_CHANGE_PARAMETER 9
#define CODA_COMMAND_FIRMWARE_GET 0xf
#define CODA_REG_BIT_RUN_INDEX 0x168
#define CODA_INDEX_SET(x) ((x) & 0x3)
#define CODA_REG_BIT_RUN_COD_STD 0x16c
#define CODADX6_MODE_DECODE_MP4 0
#define CODADX6_MODE_ENCODE_MP4 1
Annotation
- Atlas domain: Driver Families / drivers/media.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.