drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
Source file repositories/reference/linux-study-clean/drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c- Extension
.c- Size
- 58961 bytes
- Lines
- 1869
- Domain
- Driver Families
- Bucket
- drivers/media
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/pm_runtime.hwave5-helper.h
Detected Declarations
function switch_statefunction start_encodefunction wave5_vpu_enc_finish_encodefunction wave5_vpu_enc_querycapfunction wave5_vpu_enc_enum_framesizesfunction wave5_vpu_enc_enum_fmt_capfunction wave5_vpu_enc_try_fmt_capfunction wave5_vpu_enc_s_fmt_capfunction wave5_vpu_enc_g_fmt_capfunction wave5_vpu_enc_enum_fmt_outfunction wave5_vpu_enc_try_fmt_outfunction wave5_vpu_enc_s_fmt_outfunction wave5_vpu_enc_g_selectionfunction wave5_vpu_enc_s_selectionfunction wave5_vpu_enc_encoder_cmdfunction wave5_vpu_enc_g_parmfunction wave5_vpu_enc_s_parmfunction wave5_vpu_enc_s_ctrlfunction wave5_vpu_enc_queue_setupfunction wave5_vpu_enc_buf_queuefunction wave5_set_enc_openparamfunction initialize_sequencefunction prepare_fbfunction wave5_vpu_enc_start_streamingfunction streamoff_outputfunction streamoff_capturefunction wave5_vpu_enc_stop_streamingfunction wave5_set_default_formatfunction wave5_vpu_enc_queue_initfunction wave5_vpu_enc_device_runfunction wave5_vpu_enc_job_readyfunction wave5_vpu_open_encfunction wave5_vpu_enc_releasefunction wave5_vpu_enc_register_devicefunction wave5_vpu_enc_unregister_device
Annotated Snippet
if (inst->src_fmt.num_planes == 1) {
frame_buf.buf_y =
vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, 0);
frame_buf.buf_cb = frame_buf.buf_y + luma_size;
frame_buf.buf_cr = frame_buf.buf_cb + chroma_size;
} else if (inst->src_fmt.num_planes == 2) {
frame_buf.buf_y =
vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, 0);
frame_buf.buf_cb =
vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, 1);
frame_buf.buf_cr = frame_buf.buf_cb + chroma_size;
} else if (inst->src_fmt.num_planes == 3) {
frame_buf.buf_y =
vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, 0);
frame_buf.buf_cb =
vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, 1);
frame_buf.buf_cr =
vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, 2);
}
frame_buf.stride = stride;
pic_param.src_idx = src_buf->vb2_buf.index;
}
pic_param.source_frame = &frame_buf;
pic_param.code_option.implicit_header_encode = 1;
pic_param.code_option.encode_aud = inst->encode_aud;
ret = wave5_vpu_enc_start_one_frame(inst, &pic_param, fail_res);
if (ret) {
if (*fail_res == WAVE5_SYSERR_QUEUEING_FAIL)
return -EINVAL;
dev_dbg(inst->dev->dev, "%s: wave5_vpu_enc_start_one_frame fail: %d\n",
__func__, ret);
src_buf = v4l2_m2m_src_buf_remove(m2m_ctx);
if (!src_buf) {
dev_dbg(inst->dev->dev,
"%s: Removing src buf failed, the queue is empty\n",
__func__);
return -EINVAL;
}
dst_buf = v4l2_m2m_dst_buf_remove(m2m_ctx);
if (!dst_buf) {
dev_dbg(inst->dev->dev,
"%s: Removing dst buf failed, the queue is empty\n",
__func__);
return -EINVAL;
}
switch_state(inst, VPU_INST_STATE_STOP);
dst_buf->vb2_buf.timestamp = src_buf->vb2_buf.timestamp;
v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_ERROR);
v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_ERROR);
} else {
dev_dbg(inst->dev->dev, "%s: wave5_vpu_enc_start_one_frame success\n",
__func__);
}
return 0;
}
static void wave5_vpu_enc_finish_encode(struct vpu_instance *inst)
{
struct v4l2_m2m_ctx *m2m_ctx = inst->v4l2_fh.m2m_ctx;
int ret;
struct enc_output_info enc_output_info;
struct vb2_v4l2_buffer *src_buf = NULL;
struct vb2_v4l2_buffer *dst_buf = NULL;
ret = wave5_vpu_enc_get_output_info(inst, &enc_output_info);
if (ret) {
dev_dbg(inst->dev->dev,
"%s: vpu_enc_get_output_info fail: %d reason: %u | info: %u\n",
__func__, ret, enc_output_info.error_reason, enc_output_info.warn_info);
return;
}
dev_dbg(inst->dev->dev,
"%s: pic_type %i recon_idx %i src_idx %i pic_byte %u pts %llu\n",
__func__, enc_output_info.pic_type, enc_output_info.recon_frame_index,
enc_output_info.enc_src_idx, enc_output_info.enc_pic_byte, enc_output_info.pts);
if (enc_output_info.enc_src_idx >= 0) {
src_buf = v4l2_m2m_src_buf_remove_by_idx(m2m_ctx, enc_output_info.enc_src_idx);
if (!src_buf) {
dev_warn(inst->dev->dev, "%s: no source buffer found\n", __func__);
} else {
inst->timestamp = src_buf->vb2_buf.timestamp;
v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
}
}
Annotation
- Immediate include surface: `linux/pm_runtime.h`, `wave5-helper.h`.
- Detected declarations: `function switch_state`, `function start_encode`, `function wave5_vpu_enc_finish_encode`, `function wave5_vpu_enc_querycap`, `function wave5_vpu_enc_enum_framesizes`, `function wave5_vpu_enc_enum_fmt_cap`, `function wave5_vpu_enc_try_fmt_cap`, `function wave5_vpu_enc_s_fmt_cap`, `function wave5_vpu_enc_g_fmt_cap`, `function wave5_vpu_enc_enum_fmt_out`.
- Atlas domain: Driver Families / drivers/media.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.