drivers/media/platform/chips-media/wave5/wave5-vpuapi.c
Source file repositories/reference/linux-study-clean/drivers/media/platform/chips-media/wave5/wave5-vpuapi.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/media/platform/chips-media/wave5/wave5-vpuapi.c- Extension
.c- Size
- 25096 bytes
- Lines
- 1015
- Domain
- Driver Families
- Bucket
- drivers/media
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bug.hlinux/pm_runtime.hlinux/delay.hwave5-vpuapi.hwave5-regdefine.hwave5.h
Detected Declarations
function Copyrightfunction wave5_vpu_init_with_bitcodefunction wave5_vpu_flush_instancefunction wave5_vpu_get_version_infofunction wave5_check_dec_open_paramfunction wave5_vpu_dec_openfunction reset_auxiliary_buffersfunction wave5_vpu_dec_closefunction wave5_vpu_dec_issue_seq_initfunction wave5_vpu_dec_complete_seq_initfunction wave5_vpu_dec_register_frame_buffer_exfunction wave5_vpu_dec_get_bitstream_bufferfunction wave5_vpu_dec_update_bitstream_bufferfunction wave5_vpu_dec_start_one_framefunction wave5_vpu_dec_set_rd_ptrfunction wave5_vpu_dec_get_rd_ptrfunction wave5_vpu_dec_get_output_infofunction wave5_vpu_dec_clr_disp_flagfunction wave5_vpu_dec_set_disp_flagfunction wave5_vpu_dec_reset_framebufferfunction wave5_vpu_dec_give_commandfunction wave5_vpu_enc_openfunction wave5_vpu_enc_closefunction wave5_vpu_enc_register_frame_bufferfunction wave5_check_enc_paramfunction wave5_vpu_enc_start_one_framefunction wave5_vpu_enc_get_output_infofunction wave5_vpu_enc_give_commandfunction wave5_vpu_enc_issue_seq_initfunction wave5_vpu_enc_complete_seq_init
Annotated Snippet
if (ret < 0 && ret != -EBUSY) {
dev_warn(inst->dev->dev, "Flush of %s instance with id: %d fail: %d\n",
inst->type == VPU_INST_TYPE_DEC ? "DECODER" : "ENCODER", inst->id,
ret);
mutex_unlock(&inst->dev->hw_lock);
return ret;
}
if (ret == -EBUSY && retry++ >= MAX_FIRMWARE_CALL_RETRY) {
dev_warn(inst->dev->dev, "Flush of %s instance with id: %d timed out!\n",
inst->type == VPU_INST_TYPE_DEC ? "DECODER" : "ENCODER", inst->id);
mutex_unlock(&inst->dev->hw_lock);
return -ETIMEDOUT;
} else if (ret == -EBUSY) {
struct dec_output_info dec_info;
mutex_unlock(&inst->dev->hw_lock);
wave5_vpu_dec_get_output_info(inst, &dec_info);
mutex_ret = mutex_lock_interruptible(&inst->dev->hw_lock);
if (mutex_ret)
return mutex_ret;
if (dec_info.index_frame_display >= 0) {
mutex_unlock(&inst->dev->hw_lock);
wave5_vpu_dec_set_disp_flag(inst, dec_info.index_frame_display);
mutex_ret = mutex_lock_interruptible(&inst->dev->hw_lock);
if (mutex_ret)
return mutex_ret;
}
}
} while (ret != 0);
mutex_unlock(&inst->dev->hw_lock);
return ret;
}
int wave5_vpu_get_version_info(struct device *dev, u32 *revision, unsigned int *product_id)
{
int ret;
struct vpu_device *vpu_dev = dev_get_drvdata(dev);
ret = mutex_lock_interruptible(&vpu_dev->hw_lock);
if (ret)
return ret;
if (!wave5_vpu_is_init(vpu_dev)) {
ret = -EINVAL;
goto err_out;
}
if (product_id)
*product_id = vpu_dev->product;
ret = wave5_vpu_get_version(vpu_dev, revision);
err_out:
mutex_unlock(&vpu_dev->hw_lock);
return ret;
}
static int wave5_check_dec_open_param(struct vpu_instance *inst, struct dec_open_param *param)
{
if (inst->id >= MAX_NUM_INSTANCE) {
dev_err(inst->dev->dev, "Too many simultaneous instances: %d (max: %u)\n",
inst->id, MAX_NUM_INSTANCE);
return -EOPNOTSUPP;
}
if (param->bitstream_buffer % 8) {
dev_err(inst->dev->dev,
"Bitstream buffer must be aligned to a multiple of 8\n");
return -EINVAL;
}
if (param->bitstream_buffer_size % 1024 ||
param->bitstream_buffer_size < MIN_BITSTREAM_BUFFER_SIZE) {
dev_err(inst->dev->dev,
"Bitstream buffer size must be aligned to a multiple of 1024 and have a minimum size of %d\n",
MIN_BITSTREAM_BUFFER_SIZE);
return -EINVAL;
}
return 0;
}
int wave5_vpu_dec_open(struct vpu_instance *inst, struct dec_open_param *open_param)
{
struct dec_info *p_dec_info;
int ret;
struct vpu_device *vpu_dev = inst->dev;
dma_addr_t buffer_addr;
size_t buffer_size;
Annotation
- Immediate include surface: `linux/bug.h`, `linux/pm_runtime.h`, `linux/delay.h`, `wave5-vpuapi.h`, `wave5-regdefine.h`, `wave5.h`.
- Detected declarations: `function Copyright`, `function wave5_vpu_init_with_bitcode`, `function wave5_vpu_flush_instance`, `function wave5_vpu_get_version_info`, `function wave5_check_dec_open_param`, `function wave5_vpu_dec_open`, `function reset_auxiliary_buffers`, `function wave5_vpu_dec_close`, `function wave5_vpu_dec_issue_seq_init`, `function wave5_vpu_dec_complete_seq_init`.
- Atlas domain: Driver Families / drivers/media.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.