drivers/media/platform/mediatek/mdp3/mdp_reg_rsz.h

File Facts

System

Linux kernel

Corpus path

drivers/media/platform/mediatek/mdp3/mdp_reg_rsz.h

Extension

.h

Size

2096 bytes

Lines

42

Domain

Driver Families

Bucket

drivers/media

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef __MDP_REG_RSZ_H__
#define __MDP_REG_RSZ_H__

#define PRZ_ENABLE                                        0x000
#define PRZ_CONTROL_1                                     0x004
#define PRZ_CONTROL_2                                     0x008
#define PRZ_INPUT_IMAGE                                   0x010
#define PRZ_OUTPUT_IMAGE                                  0x014
#define PRZ_HORIZONTAL_COEFF_STEP                         0x018
#define PRZ_VERTICAL_COEFF_STEP                           0x01c
#define PRZ_LUMA_HORIZONTAL_INTEGER_OFFSET                0x020
#define PRZ_LUMA_HORIZONTAL_SUBPIXEL_OFFSET               0x024
#define PRZ_LUMA_VERTICAL_INTEGER_OFFSET                  0x028
#define PRZ_LUMA_VERTICAL_SUBPIXEL_OFFSET                 0x02c
#define PRZ_CHROMA_HORIZONTAL_INTEGER_OFFSET              0x030
#define PRZ_CHROMA_HORIZONTAL_SUBPIXEL_OFFSET             0x034
#define RSZ_ETC_CONTROL                                   0x22c

/* MASK */
#define PRZ_ENABLE_MASK                                   0x00010001
#define PRZ_CONTROL_1_MASK                                0xfffffff3
#define PRZ_CONTROL_2_MASK                                0x0ffffaff
#define PRZ_INPUT_IMAGE_MASK                              0xffffffff
#define PRZ_OUTPUT_IMAGE_MASK                             0xffffffff
#define PRZ_HORIZONTAL_COEFF_STEP_MASK                    0x007fffff
#define PRZ_VERTICAL_COEFF_STEP_MASK                      0x007fffff
#define PRZ_LUMA_HORIZONTAL_INTEGER_OFFSET_MASK           0x0000ffff
#define PRZ_LUMA_HORIZONTAL_SUBPIXEL_OFFSET_MASK          0x001fffff
#define PRZ_LUMA_VERTICAL_INTEGER_OFFSET_MASK             0x0000ffff
#define PRZ_LUMA_VERTICAL_SUBPIXEL_OFFSET_MASK            0x001fffff
#define PRZ_CHROMA_HORIZONTAL_INTEGER_OFFSET_MASK         0x0000ffff
#define PRZ_CHROMA_HORIZONTAL_SUBPIXEL_OFFSET_MASK        0x001fffff
#define RSZ_ETC_CONTROL_MASK                              0xff770000

#endif // __MDP_REG_RSZ_H__

Annotation

• Atlas domain: Driver Families / drivers/media.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.