drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.c

Source file repositories/reference/linux-study-clean/drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.c

File Facts

System
Linux kernel
Corpus path
drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.c
Extension
.c
Size
60849 bytes
Lines
2021
Domain
Driver Families
Bucket
drivers/media
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (mdp_cfg->rdma_support_10bit && en_ufo) {
			/* Setup source buffer base */
			if (CFG_CHECK(MT8183, p_id))
				reg = CFG_COMP(MT8183, ctx->param, rdma.ufo_dec_y);
			else if (CFG_CHECK(MT8195, p_id))
				reg = CFG_COMP(MT8195, ctx->param, rdma.ufo_dec_y);
			MM_REG_WRITE(cmd, subsys_id, base,
				     MDP_RDMA_UFO_DEC_LENGTH_BASE_Y, reg);

			if (CFG_CHECK(MT8183, p_id))
				reg = CFG_COMP(MT8183, ctx->param, rdma.ufo_dec_c);
			else if (CFG_CHECK(MT8195, p_id))
				reg = CFG_COMP(MT8195, ctx->param, rdma.ufo_dec_c);
			MM_REG_WRITE(cmd, subsys_id, base,
				     MDP_RDMA_UFO_DEC_LENGTH_BASE_C, reg);

			/* Set 10bit source frame pitch */
			if (block10bit) {
				if (CFG_CHECK(MT8183, p_id))
					reg = CFG_COMP(MT8183, ctx->param, rdma.mf_bkgd_in_pxl);
				else if (CFG_CHECK(MT8195, p_id))
					reg = CFG_COMP(MT8195, ctx->param, rdma.mf_bkgd_in_pxl);
				MM_REG_WRITE_MASK(cmd, subsys_id, base,
						  MDP_RDMA_MF_BKGD_SIZE_IN_PXL,
						  reg, 0x001FFFFF);
			}
		}

	if (CFG_CHECK(MT8183, p_id)) {
		reg = CFG_COMP(MT8183, ctx->param, rdma.control);
		rdma_con_mask = 0x1110;
	} else if (CFG_CHECK(MT8195, p_id)) {
		reg = CFG_COMP(MT8195, ctx->param, rdma.control);
		rdma_con_mask = 0x1130;
	}
	MM_REG_WRITE_MASK(cmd, subsys_id, base, MDP_RDMA_CON, reg, rdma_con_mask);

	/* Setup source buffer base */
	if (CFG_CHECK(MT8183, p_id))
		reg = CFG_COMP(MT8183, ctx->param, rdma.iova[0]);
	else if (CFG_CHECK(MT8195, p_id))
		reg = CFG_COMP(MT8195, ctx->param, rdma.iova[0]);
	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_SRC_BASE_0, reg);

	if (CFG_CHECK(MT8183, p_id))
		reg = CFG_COMP(MT8183, ctx->param, rdma.iova[1]);
	else if (CFG_CHECK(MT8195, p_id))
		reg = CFG_COMP(MT8195, ctx->param, rdma.iova[1]);
	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_SRC_BASE_1, reg);

	if (CFG_CHECK(MT8183, p_id))
		reg = CFG_COMP(MT8183, ctx->param, rdma.iova[2]);
	else if (CFG_CHECK(MT8195, p_id))
		reg = CFG_COMP(MT8195, ctx->param, rdma.iova[2]);
	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_SRC_BASE_2, reg);

	/* Setup source buffer end */
	if (CFG_CHECK(MT8183, p_id))
		reg = CFG_COMP(MT8183, ctx->param, rdma.iova_end[0]);
	else if (CFG_CHECK(MT8195, p_id))
		reg = CFG_COMP(MT8195, ctx->param, rdma.iova_end[0]);
	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_SRC_END_0, reg);

	if (CFG_CHECK(MT8183, p_id))
		reg = CFG_COMP(MT8183, ctx->param, rdma.iova_end[1]);
	else if (CFG_CHECK(MT8195, p_id))
		reg = CFG_COMP(MT8195, ctx->param, rdma.iova_end[1]);
	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_SRC_END_1, reg);

	if (CFG_CHECK(MT8183, p_id))
		reg = CFG_COMP(MT8183, ctx->param, rdma.iova_end[2]);
	else if (CFG_CHECK(MT8195, p_id))
		reg = CFG_COMP(MT8195, ctx->param, rdma.iova_end[2]);
	MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_SRC_END_2, reg);

	/* Setup source frame pitch */
	if (CFG_CHECK(MT8183, p_id))
		reg = CFG_COMP(MT8183, ctx->param, rdma.mf_bkgd);
	else if (CFG_CHECK(MT8195, p_id))
		reg = CFG_COMP(MT8195, ctx->param, rdma.mf_bkgd);
	MM_REG_WRITE_MASK(cmd, subsys_id, base, MDP_RDMA_MF_BKGD_SIZE_IN_BYTE,
			  reg, 0x001FFFFF);

	if (CFG_CHECK(MT8183, p_id))
		reg = CFG_COMP(MT8183, ctx->param, rdma.sf_bkgd);
	else if (CFG_CHECK(MT8195, p_id))
		reg = CFG_COMP(MT8195, ctx->param, rdma.sf_bkgd);
	MM_REG_WRITE_MASK(cmd, subsys_id, base, MDP_RDMA_SF_BKGD_SIZE_IN_BYTE,
			  reg, 0x001FFFFF);

Annotation

Implementation Notes