drivers/media/platform/nvidia/tegra-vde/h264.c
Source file repositories/reference/linux-study-clean/drivers/media/platform/nvidia/tegra-vde/h264.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/media/platform/nvidia/tegra-vde/h264.c- Extension
.c- Size
- 25546 bytes
- Lines
- 944
- Domain
- Driver Families
- Bucket
- drivers/media
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/iopoll.hlinux/pm_runtime.hlinux/reset.hlinux/slab.hmedia/v4l2-h264.htrace.hvde.h
Detected Declarations
struct tegra_vde_h264_decoder_ctxstruct h264_reflistsfunction tegra_vde_wait_mbefunction tegra_vde_setup_mbe_frame_idxfunction tegra_vde_mbe_set_0xa_regfunction tegra_vde_wait_bsevfunction tegra_vde_push_to_bsev_icmdqueuefunction tegra_vde_setup_frameidfunction tegra_setup_frameidxfunction tegra_vde_setup_iram_entryfunction tegra_vde_setup_iram_tablesfunction tegra_vde_setup_hw_contextfunction tegra_vde_decode_framefunction tegra_vde_validate_h264_ctxfunction tegra_vde_decode_beginfunction tegra_vde_decode_abortfunction tegra_vde_decode_endfunction tegra_vde_validate_vb_sizefunction tegra_vde_h264_setup_framefunction tegra_vde_h264_setup_framesfunction to_tegra_vde_h264_level_idcfunction tegra_vde_h264_setup_contextfunction tegra_vde_h264_decode_runfunction tegra_vde_h264_decode_wait
Annotated Snippet
struct tegra_vde_h264_decoder_ctx {
unsigned int dpb_frames_nb;
unsigned int dpb_ref_frames_with_earlier_poc_nb;
unsigned int baseline_profile;
unsigned int level_idc;
unsigned int log2_max_pic_order_cnt_lsb;
unsigned int log2_max_frame_num;
unsigned int pic_order_cnt_type;
unsigned int direct_8x8_inference_flag;
unsigned int pic_width_in_mbs;
unsigned int pic_height_in_mbs;
unsigned int pic_init_qp;
unsigned int deblocking_filter_control_present_flag;
unsigned int constrained_intra_pred_flag;
unsigned int chroma_qp_index_offset;
unsigned int pic_order_present_flag;
unsigned int num_ref_idx_l0_active_minus1;
unsigned int num_ref_idx_l1_active_minus1;
};
struct h264_reflists {
struct v4l2_h264_reference p[V4L2_H264_NUM_DPB_ENTRIES];
struct v4l2_h264_reference b0[V4L2_H264_NUM_DPB_ENTRIES];
struct v4l2_h264_reference b1[V4L2_H264_NUM_DPB_ENTRIES];
};
static int tegra_vde_wait_mbe(struct tegra_vde *vde)
{
u32 tmp;
return readl_relaxed_poll_timeout(vde->mbe + 0x8C, tmp,
tmp >= 0x10, 1, 100);
}
static int tegra_vde_setup_mbe_frame_idx(struct tegra_vde *vde,
unsigned int refs_nb,
bool setup_refs)
{
u32 value, frame_idx_enb_mask = 0;
unsigned int frame_idx;
unsigned int idx;
int err;
tegra_vde_writel(vde, 0xD0000000 | (0 << 23), vde->mbe, 0x80);
tegra_vde_writel(vde, 0xD0200000 | (0 << 23), vde->mbe, 0x80);
err = tegra_vde_wait_mbe(vde);
if (err)
return err;
if (!setup_refs)
return 0;
for (idx = 0, frame_idx = 1; idx < refs_nb; idx++, frame_idx++) {
tegra_vde_writel(vde, 0xD0000000 | (frame_idx << 23),
vde->mbe, 0x80);
tegra_vde_writel(vde, 0xD0200000 | (frame_idx << 23),
vde->mbe, 0x80);
frame_idx_enb_mask |= frame_idx << (6 * (idx % 4));
if (idx % 4 == 3 || idx == refs_nb - 1) {
value = 0xC0000000;
value |= (idx >> 2) << 24;
value |= frame_idx_enb_mask;
tegra_vde_writel(vde, value, vde->mbe, 0x80);
err = tegra_vde_wait_mbe(vde);
if (err)
return err;
frame_idx_enb_mask = 0;
}
}
return 0;
}
static void tegra_vde_mbe_set_0xa_reg(struct tegra_vde *vde, int reg, u32 val)
{
tegra_vde_writel(vde, 0xA0000000 | (reg << 24) | (val & 0xFFFF),
vde->mbe, 0x80);
tegra_vde_writel(vde, 0xA0000000 | ((reg + 1) << 24) | (val >> 16),
vde->mbe, 0x80);
}
static int tegra_vde_wait_bsev(struct tegra_vde *vde, bool wait_dma)
{
struct device *dev = vde->dev;
Annotation
- Immediate include surface: `linux/iopoll.h`, `linux/pm_runtime.h`, `linux/reset.h`, `linux/slab.h`, `media/v4l2-h264.h`, `trace.h`, `vde.h`.
- Detected declarations: `struct tegra_vde_h264_decoder_ctx`, `struct h264_reflists`, `function tegra_vde_wait_mbe`, `function tegra_vde_setup_mbe_frame_idx`, `function tegra_vde_mbe_set_0xa_reg`, `function tegra_vde_wait_bsev`, `function tegra_vde_push_to_bsev_icmdqueue`, `function tegra_vde_setup_frameid`, `function tegra_setup_frameidx`, `function tegra_vde_setup_iram_entry`.
- Atlas domain: Driver Families / drivers/media.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.