drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h

Source file repositories/reference/linux-study-clean/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h

File Facts

System: Linux kernel
Corpus path: drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
Extension: .h
Size: 17106 bytes
Lines: 419
Domain: Driver Families
Bucket: drivers/media
Inferred role: Driver Families: implementation source
Status: source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

linux/bits.h

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef __IMX8_ISI_REGS_H__
#define __IMX8_ISI_REGS_H__

#include <linux/bits.h>

/* ISI Registers Define  */
/* Channel Control Register */
#define CHNL_CTRL						0x0000
#define CHNL_CTRL_CHNL_EN					BIT(31)
#define CHNL_CTRL_CLK_EN					BIT(30)
#define CHNL_CTRL_CHNL_BYPASS					BIT(29)
#define CHNL_CTRL_CHAIN_BUF(n)					((n) << 25)
#define CHNL_CTRL_CHAIN_BUF_MASK				GENMASK(26, 25)
#define CHNL_CTRL_CHAIN_BUF_NO_CHAIN				0
#define CHNL_CTRL_CHAIN_BUF_2_CHAIN				1
#define CHNL_CTRL_SW_RST					BIT(24)
#define CHNL_CTRL_BLANK_PXL(n)					((n) << 16)
#define CHNL_CTRL_BLANK_PXL_MASK				GENMASK(23, 16)
#define CHNL_CTRL_MIPI_VC_ID(n)					((n) << 6)
#define CHNL_CTRL_MIPI_VC_ID_MASK				GENMASK(7, 6)
#define CHNL_CTRL_SRC_TYPE(n)					((n) << 4)
#define CHNL_CTRL_SRC_TYPE_MASK					BIT(4)
#define CHNL_CTRL_SRC_TYPE_DEVICE				0
#define CHNL_CTRL_SRC_TYPE_MEMORY				1
#define CHNL_CTRL_SRC_INPUT(n)					((n) << 0)
#define CHNL_CTRL_SRC_INPUT_MASK				GENMASK(2, 0)

/* Channel Image Control Register */
#define CHNL_IMG_CTRL						0x0004
#define CHNL_IMG_CTRL_FORMAT(n)					((n) << 24)
#define CHNL_IMG_CTRL_FORMAT_MASK				GENMASK(29, 24)
#define CHNL_IMG_CTRL_FORMAT_RGBA8888				0x00
#define CHNL_IMG_CTRL_FORMAT_ABGR8888				0x01
#define CHNL_IMG_CTRL_FORMAT_ARGB8888				0x02
#define CHNL_IMG_CTRL_FORMAT_RGBX888				0x03
#define CHNL_IMG_CTRL_FORMAT_XBGR888				0x04
#define CHNL_IMG_CTRL_FORMAT_XRGB888				0x05
#define CHNL_IMG_CTRL_FORMAT_RGB888P				0x06
#define CHNL_IMG_CTRL_FORMAT_BGR888P				0x07
#define CHNL_IMG_CTRL_FORMAT_A2BGR10				0x08
#define CHNL_IMG_CTRL_FORMAT_A2RGB10				0x09
#define CHNL_IMG_CTRL_FORMAT_RGB565				0x0a
#define CHNL_IMG_CTRL_FORMAT_RAW8				0x0b
#define CHNL_IMG_CTRL_FORMAT_RAW10				0x0c
#define CHNL_IMG_CTRL_FORMAT_RAW10P				0x0d
#define CHNL_IMG_CTRL_FORMAT_RAW12				0x0e
#define CHNL_IMG_CTRL_FORMAT_RAW16				0x0f
#define CHNL_IMG_CTRL_FORMAT_YUV444_1P8P			0x10
#define CHNL_IMG_CTRL_FORMAT_YUV444_2P8P			0x11
#define CHNL_IMG_CTRL_FORMAT_YUV444_3P8P			0x12
#define CHNL_IMG_CTRL_FORMAT_YUV444_1P8				0x13
#define CHNL_IMG_CTRL_FORMAT_YUV444_1P10			0x14
#define CHNL_IMG_CTRL_FORMAT_YUV444_2P10			0x15
#define CHNL_IMG_CTRL_FORMAT_YUV444_3P10			0x16
#define CHNL_IMG_CTRL_FORMAT_YUV444_1P10P			0x18
#define CHNL_IMG_CTRL_FORMAT_YUV444_2P10P			0x19
#define CHNL_IMG_CTRL_FORMAT_YUV444_3P10P			0x1a
#define CHNL_IMG_CTRL_FORMAT_YUV444_1P12			0x1c
#define CHNL_IMG_CTRL_FORMAT_YUV444_2P12			0x1d
#define CHNL_IMG_CTRL_FORMAT_YUV444_3P12			0x1e
#define CHNL_IMG_CTRL_FORMAT_YUV422_1P8P			0x20
#define CHNL_IMG_CTRL_FORMAT_YUV422_2P8P			0x21
#define CHNL_IMG_CTRL_FORMAT_YUV422_3P8P			0x22
#define CHNL_IMG_CTRL_FORMAT_YUV422_1P10			0x24
#define CHNL_IMG_CTRL_FORMAT_YUV422_2P10			0x25
#define CHNL_IMG_CTRL_FORMAT_YUV422_3P10			0x26
#define CHNL_IMG_CTRL_FORMAT_YUV422_1P10P			0x28
#define CHNL_IMG_CTRL_FORMAT_YUV422_2P10P			0x29
#define CHNL_IMG_CTRL_FORMAT_YUV422_3P10P			0x2a
#define CHNL_IMG_CTRL_FORMAT_YUV422_1P12			0x2c
#define CHNL_IMG_CTRL_FORMAT_YUV422_2P12			0x2d
#define CHNL_IMG_CTRL_FORMAT_YUV422_3P12			0x2e
#define CHNL_IMG_CTRL_FORMAT_YUV420_2P8P			0x31
#define CHNL_IMG_CTRL_FORMAT_YUV420_3P8P			0x32
#define CHNL_IMG_CTRL_FORMAT_YUV420_2P10			0x35
#define CHNL_IMG_CTRL_FORMAT_YUV420_3P10			0x36
#define CHNL_IMG_CTRL_FORMAT_YUV420_2P10P			0x39
#define CHNL_IMG_CTRL_FORMAT_YUV420_3P10P			0x3a
#define CHNL_IMG_CTRL_FORMAT_YUV420_2P12			0x3d
#define CHNL_IMG_CTRL_FORMAT_YUV420_3P12			0x3e
#define CHNL_IMG_CTRL_GBL_ALPHA_VAL(n)				((n) << 16)
#define CHNL_IMG_CTRL_GBL_ALPHA_VAL_MASK			GENMASK(23, 16)
#define CHNL_IMG_CTRL_GBL_ALPHA_EN				BIT(15)
#define CHNL_IMG_CTRL_DEINT(n)					((n) << 12)
#define CHNL_IMG_CTRL_DEINT_MASK				GENMASK(14, 12)
#define CHNL_IMG_CTRL_DEINT_WEAVE_ODD_EVEN			2
#define CHNL_IMG_CTRL_DEINT_WEAVE_EVEN_ODD			3
#define CHNL_IMG_CTRL_DEINT_BLEND_ODD_EVEN			4
#define CHNL_IMG_CTRL_DEINT_BLEND_EVEN_ODD			5
#define CHNL_IMG_CTRL_DEINT_LDOUBLE_ODD_EVEN			6

Annotation

Immediate include surface: `linux/bits.h`.
Atlas domain: Driver Families / drivers/media.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.