drivers/media/platform/qcom/iris/iris_platform_vpu3x.c

Source file repositories/reference/linux-study-clean/drivers/media/platform/qcom/iris/iris_platform_vpu3x.c

File Facts

System
Linux kernel
Corpus path
drivers/media/platform/qcom/iris/iris_platform_vpu3x.c
Extension
.c
Size
8783 bytes
Lines
250
Domain
Driver Families
Bucket
drivers/media
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) Qualcomm Innovation Center, Inc. All rights reserved.
 * Copyright (c) 2025 Linaro Ltd
 */

#include "iris_core.h"
#include "iris_ctrls.h"
#include "iris_hfi_gen2.h"
#include "iris_hfi_gen2_defines.h"
#include "iris_platform_common.h"
#include "iris_vpu_buffer.h"
#include "iris_vpu_common.h"

#include "iris_platform_qcs8300.h"
#include "iris_platform_sm8550.h"
#include "iris_platform_sm8650.h"
#include "iris_platform_sm8750.h"
#include "iris_platform_x1p42100.h"

static const struct iris_firmware_desc iris_vpu30_p4_s6_gen2_desc = {
	.firmware_data = &iris_hfi_gen2_data,
	.get_vpu_buffer_size = iris_vpu_buf_size,
	.fwname = "qcom/vpu/vpu30_p4_s6.mbn",
};

static const struct iris_firmware_desc iris_vpu30_p4_gen2_desc = {
	.firmware_data = &iris_hfi_gen2_data,
	.get_vpu_buffer_size = iris_vpu_buf_size,
	.fwname = "qcom/vpu/vpu30_p4.mbn",
};

static const struct iris_firmware_desc iris_vpu30_p1_gen2_desc = {
	.firmware_data = &iris_hfi_gen2_data,
	.get_vpu_buffer_size = iris_vpu_buf_size,
	.fwname = "qcom/vpu/vpu30_p1_s7.mbn",
};

static const struct iris_firmware_desc iris_vpu33_p4_gen2_desc = {
	.firmware_data = &iris_hfi_gen2_data,
	.get_vpu_buffer_size = iris_vpu33_buf_size,
	.fwname = "qcom/vpu/vpu33_p4.mbn",
};

static const struct iris_firmware_desc iris_vpu35_p4_gen2_desc = {
	.firmware_data = &iris_hfi_gen2_data,
	.get_vpu_buffer_size = iris_vpu33_buf_size,
	.fwname = "qcom/vpu/vpu35_p4.mbn",
};

static const u32 iris_fmts_vpu3x_dec[] = {
	[IRIS_FMT_H264] = V4L2_PIX_FMT_H264,
	[IRIS_FMT_HEVC] = V4L2_PIX_FMT_HEVC,
	[IRIS_FMT_VP9] = V4L2_PIX_FMT_VP9,
	[IRIS_FMT_AV1] = V4L2_PIX_FMT_AV1,
};

static const struct icc_info iris_icc_info_vpu3x[] = {
	{ "cpu-cfg",    1000, 1000     },
	{ "video-mem",  1000, 15000000 },
};

static const struct bw_info iris_bw_table_dec_vpu3x[] = {
	{ ((4096 * 2160) / 256) * 60, 1608000 },
	{ ((4096 * 2160) / 256) * 30,  826000 },
	{ ((1920 * 1080) / 256) * 60,  567000 },
	{ ((1920 * 1080) / 256) * 30,  294000 },
};

static const char * const iris_pmdomain_table_vpu3x[] = { "venus", "vcodec0" };

static const char * const iris_opp_pd_table_vpu3x[] = { "mxc", "mmcx" };

static const char * const iris_opp_clk_table_vpu3x[] = {
	"vcodec0_core",
	NULL,
};

static const struct tz_cp_config tz_cp_config_vpu3[] = {
	{
		.cp_start = 0,
		.cp_size = 0x25800000,
		.cp_nonpixel_start = 0x01000000,
		.cp_nonpixel_size = 0x24800000,
	},
};

/*
 * Shares most of SM8550 data except:
 * - inst_caps to platform_inst_cap_qcs8300

Annotation

Implementation Notes