drivers/media/platform/qcom/iris/iris_vpu_buffer.c
Source file repositories/reference/linux-study-clean/drivers/media/platform/qcom/iris/iris_vpu_buffer.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/media/platform/qcom/iris/iris_vpu_buffer.c- Extension
.c- Size
- 78502 bytes
- Lines
- 2258
- Domain
- Driver Families
- Bucket
- drivers/media
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
iris_instance.hiris_vpu_buffer.hiris_hfi_gen1_defines.hiris_hfi_gen2_defines.h
Detected Declarations
struct iris_vpu_buf_type_handlefunction Copyrightfunction hfi_buffer_bin_h264dfunction size_av1d_hw_bin_bufferfunction hfi_buffer_bin_av1dfunction size_h265d_hw_bin_bufferfunction hfi_buffer_bin_vp9dfunction hfi_buffer_bin_h265dfunction hfi_buffer_comv_h264dfunction hfi_buffer_comv_h265dfunction num_lcufunction hfi_buffer_comv_av1dfunction size_h264d_bse_cmd_buffunction size_h265d_bse_cmd_buffunction hfi_buffer_persist_h265dfunction hfi_iris3_vp9d_comv_sizefunction hfi_buffer_persist_vp9dfunction size_h264d_vpp_cmd_buffunction hfi_buffer_persist_h264dfunction hfi_buffer_persist_av1dfunction hfi_buffer_non_comv_h264dfunction size_h265d_vpp_cmd_buffunction hfi_buffer_non_comv_h265dfunction size_vpss_lbfunction size_h265d_lb_fe_top_datafunction size_h265d_lb_fe_top_ctrlfunction size_h265d_lb_fe_left_ctrlfunction size_h265d_lb_se_top_ctrlfunction size_h265d_lb_se_left_ctrlfunction size_h265d_lb_pe_top_datafunction size_h265d_lb_vsp_topfunction size_h265d_lb_vsp_leftfunction size_h265d_lb_recon_dma_metadata_wrfunction size_h265d_qpfunction hfi_buffer_line_h265dfunction size_vpxd_lb_fe_left_ctrlfunction size_vpxd_lb_fe_top_ctrlfunction size_vpxd_lb_se_top_ctrlfunction size_vpxd_lb_se_left_ctrlfunction size_vpxd_lb_recon_dma_metadata_wrfunction size_mp2d_lb_fe_top_datafunction size_vp9d_lb_fe_top_datafunction size_vp9d_lb_pe_top_datafunction size_vp9d_lb_vsp_topfunction size_vp9d_qpfunction hfi_iris3_vp9d_lb_sizefunction hfi_buffer_line_vp9dfunction hfi_buffer_line_h264d
Annotated Snippet
struct iris_vpu_buf_type_handle {
enum iris_buffer_type type;
u32 (*handle)(struct iris_inst *inst);
};
u32 iris_vpu_buf_size(struct iris_inst *inst, enum iris_buffer_type buffer_type)
{
const struct iris_vpu_buf_type_handle *buf_type_handle_arr = NULL;
u32 size = 0, buf_type_handle_size = 0, i;
static const struct iris_vpu_buf_type_handle dec_internal_buf_type_handle[] = {
{BUF_BIN, iris_vpu_dec_bin_size },
{BUF_COMV, iris_vpu3x_4x_dec_comv_size },
{BUF_NON_COMV, iris_vpu_dec_non_comv_size },
{BUF_LINE, iris_vpu_dec_line_size },
{BUF_PERSIST, iris_vpu_dec_persist_size },
{BUF_DPB, iris_vpu_dec_dpb_size },
{BUF_SCRATCH_1, iris_vpu_dec_scratch1_size },
{BUF_PARTIAL, iris_vpu_dec_partial_size },
};
static const struct iris_vpu_buf_type_handle enc_internal_buf_type_handle[] = {
{BUF_BIN, iris_vpu_enc_bin_size },
{BUF_COMV, iris_vpu_enc_comv_size },
{BUF_NON_COMV, iris_vpu_enc_non_comv_size },
{BUF_LINE, iris_vpu_enc_line_size },
{BUF_ARP, iris_vpu_enc_arp_size },
{BUF_VPSS, iris_vpu_enc_vpss_size },
{BUF_SCRATCH_1, iris_vpu_enc_scratch1_size },
{BUF_SCRATCH_2, iris_vpu_enc_scratch2_size },
};
if (inst->domain == DECODER) {
buf_type_handle_size = ARRAY_SIZE(dec_internal_buf_type_handle);
buf_type_handle_arr = dec_internal_buf_type_handle;
} else if (inst->domain == ENCODER) {
buf_type_handle_size = ARRAY_SIZE(enc_internal_buf_type_handle);
buf_type_handle_arr = enc_internal_buf_type_handle;
}
for (i = 0; i < buf_type_handle_size; i++) {
if (buf_type_handle_arr[i].type == buffer_type) {
size = buf_type_handle_arr[i].handle(inst);
break;
}
}
return size;
}
u32 iris_vpu33_buf_size(struct iris_inst *inst, enum iris_buffer_type buffer_type)
{
u32 size = 0, i;
static const struct iris_vpu_buf_type_handle enc_internal_buf_type_handle[] = {
{BUF_BIN, iris_vpu_enc_bin_size },
{BUF_COMV, iris_vpu_enc_comv_size },
{BUF_NON_COMV, iris_vpu_enc_non_comv_size },
{BUF_LINE, iris_vpu33_enc_line_size },
{BUF_ARP, iris_vpu_enc_arp_size },
{BUF_VPSS, iris_vpu_enc_vpss_size },
{BUF_SCRATCH_1, iris_vpu_enc_scratch1_size },
{BUF_SCRATCH_2, iris_vpu_enc_scratch2_size },
};
if (inst->domain == DECODER)
return iris_vpu_buf_size(inst, buffer_type);
for (i = 0; i < ARRAY_SIZE(enc_internal_buf_type_handle); i++) {
if (enc_internal_buf_type_handle[i].type == buffer_type) {
size = enc_internal_buf_type_handle[i].handle(inst);
break;
}
}
return size;
}
u32 iris_vpu4x_buf_size(struct iris_inst *inst, enum iris_buffer_type buffer_type)
{
const struct iris_vpu_buf_type_handle *buf_type_handle_arr = NULL;
u32 size = 0, buf_type_handle_size = 0, i;
static const struct iris_vpu_buf_type_handle dec_internal_buf_type_handle[] = {
{BUF_BIN, iris_vpu_dec_bin_size },
{BUF_COMV, iris_vpu3x_4x_dec_comv_size },
{BUF_NON_COMV, iris_vpu_dec_non_comv_size },
{BUF_LINE, iris_vpu4x_dec_line_size },
{BUF_PERSIST, iris_vpu4x_dec_persist_size },
{BUF_DPB, iris_vpu_dec_dpb_size },
Annotation
- Immediate include surface: `iris_instance.h`, `iris_vpu_buffer.h`, `iris_hfi_gen1_defines.h`, `iris_hfi_gen2_defines.h`.
- Detected declarations: `struct iris_vpu_buf_type_handle`, `function Copyright`, `function hfi_buffer_bin_h264d`, `function size_av1d_hw_bin_buffer`, `function hfi_buffer_bin_av1d`, `function size_h265d_hw_bin_buffer`, `function hfi_buffer_bin_vp9d`, `function hfi_buffer_bin_h265d`, `function hfi_buffer_comv_h264d`, `function hfi_buffer_comv_h265d`.
- Atlas domain: Driver Families / drivers/media.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.