drivers/media/platform/qcom/iris/iris_vpu_buffer.h
Source file repositories/reference/linux-study-clean/drivers/media/platform/qcom/iris/iris_vpu_buffer.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/media/platform/qcom/iris/iris_vpu_buffer.h- Extension
.h- Size
- 9803 bytes
- Lines
- 294
- Domain
- Driver Families
- Bucket
- drivers/media
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct iris_instfunction size_h264d_lb_fe_top_datafunction size_h264d_lb_fe_top_ctrlfunction size_h264d_lb_fe_left_ctrlfunction size_h264d_lb_se_top_ctrlfunction size_h264d_lb_se_left_ctrlfunction size_h264d_lb_pe_top_datafunction size_h264d_lb_vsp_topfunction size_h264d_lb_recon_dma_metadata_wrfunction size_h264d_qpfunction size_av1d_lb_fe_top_datafunction size_av1d_lb_fe_left_datafunction size_av1d_lb_fe_top_ctrlfunction size_av1d_lb_fe_left_ctrlfunction size_av1d_lb_se_top_ctrlfunction size_av1d_lb_se_left_ctrlfunction size_av1d_lb_pe_top_datafunction size_av1d_lb_vsp_topfunction size_av1d_lb_recon_dma_metadata_wrfunction size_av1d_qp
Annotated Snippet
#ifndef __IRIS_VPU_BUFFER_H__
#define __IRIS_VPU_BUFFER_H__
struct iris_inst;
#define MIN_BUFFERS 4
#define DMA_ALIGNMENT 256
#define HFI_ALIGNMENT_4096 4096
#define NUM_HW_PIC_BUF 32
#define LCU_MAX_SIZE_PELS 64
#define LCU_MIN_SIZE_PELS 16
#define HDR10_HIST_EXTRADATA_SIZE (4 * 1024)
#define SIZE_HW_PIC(size_per_buf) (NUM_HW_PIC_BUF * (size_per_buf))
#define MAX_TILE_COLUMNS 32
#define BIN_BUFFER_THRESHOLD (1280 * 736)
#define VPP_CMD_MAX_SIZE (BIT(20))
#define H264D_MAX_SLICE 1800
#define SIZE_H264D_BUFTAB_T 256
#define SIZE_H264D_BSE_CMD_PER_BUF (32 * 4)
#define SIZE_H264D_VPP_CMD_PER_BUF 512
#define NUM_SLIST_BUF_H264 (256 + 32)
#define SIZE_SLIST_BUF_H264 512
#define H264_DISPLAY_BUF_SIZE 3328
#define H264_NUM_FRM_INFO 66
#define H265_NUM_TILE_COL 32
#define H265_NUM_TILE_ROW 128
#define H265_NUM_TILE (H265_NUM_TILE_ROW * H265_NUM_TILE_COL + 1)
#define SIZE_H265D_BSE_CMD_PER_BUF (16 * sizeof(u32))
#define NUM_SLIST_BUF_H265 (80 + 20)
#define SIZE_SLIST_BUF_H265 (BIT(10))
#define H265_DISPLAY_BUF_SIZE (3072)
#define H265_NUM_FRM_INFO (48)
#define SIZE_ONE_SLICE_BUF 256
#define VP9_NUM_FRAME_INFO_BUF 32
#define VP9_NUM_PROBABILITY_TABLE_BUF (VP9_NUM_FRAME_INFO_BUF + 4)
#define VP9_PROB_TABLE_SIZE (3840)
#define VP9_FRAME_INFO_BUF_SIZE (6144)
#define VP9_FRAME_INFO_BUF_SIZE_VPU4X (6400)
#define BUFFER_ALIGNMENT_16_BYTES 16
#define BUFFER_ALIGNMENT_32_BYTES 32
#define BUFFER_ALIGNMENT_64_BYTES 64
#define BUFFER_ALIGNMENT_256_BYTES 256
#define BUFFER_ALIGNMENT_512_BYTES 512
#define CCE_TILE_OFFSET_SIZE ALIGN(32 * 4 * 4, BUFFER_ALIGNMENT_32_BYTES)
#define MAX_SUPERFRAME_HEADER_LEN (34)
#define MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE 64
#define MAX_FE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE 64
#define MAX_FE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE 64
#define MAX_SE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE (128 / 8)
#define MAX_SE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE (128 / 8)
#define VP9_UDC_HEADER_BUF_SIZE (3 * 128)
#define SIZE_SEI_USERDATA 4096
#define SIZE_DOLBY_RPU_METADATA (41 * 1024)
#define H264_CABAC_HDR_RATIO_HD_TOT 1
#define H264_CABAC_RES_RATIO_HD_TOT 3
#define H265D_MAX_SLICE 3600
#define SIZE_H265D_HW_PIC_T SIZE_H264D_HW_PIC_T
#define H265_CABAC_HDR_RATIO_HD_TOT 2
#define H265_CABAC_RES_RATIO_HD_TOT 2
#define SIZE_H265D_VPP_CMD_PER_BUF (256)
#define SIZE_THREE_DIMENSION_USERDATA 768
#define SIZE_H265D_ARP 9728
#define VPX_DECODER_FRAME_CONCURENCY_LVL (2)
#define VPX_DECODER_FRAME_BIN_HDR_BUDGET 1
#define VPX_DECODER_FRAME_BIN_RES_BUDGET 3
#define VPX_DECODER_FRAME_BIN_DENOMINATOR 2
#define VPX_DECODER_FRAME_BIN_RES_BUDGET_RATIO (3 / 2)
#define SIZE_H264D_HW_PIC_T (BIT(11))
#define FE_LFT_CTRL_LINE_NUMBERS 4
#define FE_LFT_DB_DATA_LINE_NUMBERS 2
#define FE_LFT_LR_DATA_LINE_NUMBERS 4
#define FE_TOP_CTRL_LINE_NUMBERS 3
#define FE_TOP_DATA_LUMA_LINE_NUMBERS 2
#define FE_TOP_DATA_CHROMA_LINE_NUMBERS 3
#define FE_SDC_DATA_PER_BLOCK 16
#define SE_CTRL_DATA_PER_BLOCK 2020
Annotation
- Detected declarations: `struct iris_inst`, `function size_h264d_lb_fe_top_data`, `function size_h264d_lb_fe_top_ctrl`, `function size_h264d_lb_fe_left_ctrl`, `function size_h264d_lb_se_top_ctrl`, `function size_h264d_lb_se_left_ctrl`, `function size_h264d_lb_pe_top_data`, `function size_h264d_lb_vsp_top`, `function size_h264d_lb_recon_dma_metadata_wr`, `function size_h264d_qp`.
- Atlas domain: Driver Families / drivers/media.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.