drivers/media/platform/raspberrypi/rp1-cfe/dphy.c

Source file repositories/reference/linux-study-clean/drivers/media/platform/raspberrypi/rp1-cfe/dphy.c

File Facts

System
Linux kernel
Corpus path
drivers/media/platform/raspberrypi/rp1-cfe/dphy.c
Extension
.c
Size
5138 bytes
Lines
182
Domain
Driver Families
Bucket
drivers/media
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only
/*
 * RP1 CSI-2 Driver
 *
 * Copyright (c) 2021-2024 Raspberry Pi Ltd.
 * Copyright (c) 2023-2024 Ideas on Board Oy
 */

#include <linux/delay.h>
#include <linux/pm_runtime.h>

#include "dphy.h"

#define dphy_dbg(dphy, fmt, arg...) dev_dbg((dphy)->dev, fmt, ##arg)
#define dphy_err(dphy, fmt, arg...) dev_err((dphy)->dev, fmt, ##arg)

/* DW dphy Host registers */
#define DPHY_VERSION		0x000
#define DPHY_N_LANES		0x004
#define DPHY_RESETN		0x008
#define DPHY_PHY_SHUTDOWNZ	0x040
#define DPHY_PHY_RSTZ		0x044
#define DPHY_PHY_RX		0x048
#define	DPHY_PHY_STOPSTATE	0x04c
#define DPHY_PHY_TST_CTRL0	0x050
#define DPHY_PHY_TST_CTRL1	0x054
#define DPHY_PHY2_TST_CTRL0	0x058
#define DPHY_PHY2_TST_CTRL1	0x05c

/* DW dphy Host Transactions */
#define DPHY_HS_RX_CTRL_LANE0_OFFSET	0x44
#define DPHY_PLL_INPUT_DIV_OFFSET	0x17
#define DPHY_PLL_LOOP_DIV_OFFSET	0x18
#define DPHY_PLL_DIV_CTRL_OFFSET	0x19

static u32 dw_csi2_host_read(struct dphy_data *dphy, u32 offset)
{
	return readl(dphy->base + offset);
}

static void dw_csi2_host_write(struct dphy_data *dphy, u32 offset, u32 data)
{
	writel(data, dphy->base + offset);
}

static void set_tstclr(struct dphy_data *dphy, u32 val)
{
	u32 ctrl0 = dw_csi2_host_read(dphy, DPHY_PHY_TST_CTRL0);

	dw_csi2_host_write(dphy, DPHY_PHY_TST_CTRL0, (ctrl0 & ~1) | val);
}

static void set_tstclk(struct dphy_data *dphy, u32 val)
{
	u32 ctrl0 = dw_csi2_host_read(dphy, DPHY_PHY_TST_CTRL0);

	dw_csi2_host_write(dphy, DPHY_PHY_TST_CTRL0, (ctrl0 & ~2) | (val << 1));
}

static uint8_t get_tstdout(struct dphy_data *dphy)
{
	u32 ctrl1 = dw_csi2_host_read(dphy, DPHY_PHY_TST_CTRL1);

	return ((ctrl1 >> 8) & 0xff);
}

static void set_testen(struct dphy_data *dphy, u32 val)
{
	u32 ctrl1 = dw_csi2_host_read(dphy, DPHY_PHY_TST_CTRL1);

	dw_csi2_host_write(dphy, DPHY_PHY_TST_CTRL1,
			   (ctrl1 & ~(1 << 16)) | (val << 16));
}

static void set_testdin(struct dphy_data *dphy, u32 val)
{
	u32 ctrl1 = dw_csi2_host_read(dphy, DPHY_PHY_TST_CTRL1);

	dw_csi2_host_write(dphy, DPHY_PHY_TST_CTRL1, (ctrl1 & ~0xff) | val);
}

static uint8_t dphy_transaction(struct dphy_data *dphy, u8 test_code,
				uint8_t test_data)
{
	/* See page 101 of the MIPI DPHY databook. */
	set_tstclk(dphy, 1);
	set_testen(dphy, 0);
	set_testdin(dphy, test_code);
	set_testen(dphy, 1);
	set_tstclk(dphy, 0);

Annotation

Implementation Notes