drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-h264.c
Source file repositories/reference/linux-study-clean/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-h264.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-h264.c- Extension
.c- Size
- 16170 bytes
- Lines
- 470
- Domain
- Driver Families
- Bucket
- drivers/media
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
media/v4l2-h264.hmedia/v4l2-mem2mem.hrkvdec.hrkvdec-cabac.hrkvdec-rcb.hrkvdec-h264-common.hrkvdec-vdpu381-regs.h
Detected Declarations
struct rkvdec_spsstruct rkvdec_ppsstruct rkvdec_sps_ppsstruct rkvdec_h264_priv_tblstruct rkvdec_h264_ctxfunction assemble_hw_ppsfunction rkvdec_write_regsfunction config_registersfunction rkvdec_h264_startfunction rkvdec_h264_stopfunction rkvdec_h264_runfunction rkvdec_h264_try_ctrl
Annotated Snippet
struct rkvdec_sps {
u16 seq_parameter_set_id: 4;
u16 profile_idc: 8;
u16 constraint_set3_flag: 1;
u16 chroma_format_idc: 2;
u16 bit_depth_luma: 3;
u16 bit_depth_chroma: 3;
u16 qpprime_y_zero_transform_bypass_flag: 1;
u16 log2_max_frame_num_minus4: 4;
u16 max_num_ref_frames: 5;
u16 pic_order_cnt_type: 2;
u16 log2_max_pic_order_cnt_lsb_minus4: 4;
u16 delta_pic_order_always_zero_flag: 1;
u16 pic_width_in_mbs: 12;
u16 pic_height_in_mbs: 12;
u16 frame_mbs_only_flag: 1;
u16 mb_adaptive_frame_field_flag: 1;
u16 direct_8x8_inference_flag: 1;
u16 mvc_extension_enable: 1;
u16 num_views: 2;
u16 reserved_bits: 12;
u16 reserved[11];
} __packed;
struct rkvdec_pps {
u16 pic_parameter_set_id: 8;
u16 pps_seq_parameter_set_id: 5;
u16 entropy_coding_mode_flag: 1;
u16 bottom_field_pic_order_in_frame_present_flag: 1;
u16 num_ref_idx_l0_default_active_minus1: 5;
u16 num_ref_idx_l1_default_active_minus1: 5;
u16 weighted_pred_flag: 1;
u16 weighted_bipred_idc: 2;
u16 pic_init_qp_minus26: 7;
u16 pic_init_qs_minus26: 6;
u16 chroma_qp_index_offset: 5;
u16 deblocking_filter_control_present_flag: 1;
u16 constrained_intra_pred_flag: 1;
u16 redundant_pic_cnt_present: 1;
u16 transform_8x8_mode_flag: 1;
u16 second_chroma_qp_index_offset: 5;
u16 scaling_list_enable_flag: 1;
u32 scaling_list_address;
u16 is_longterm;
u8 reserved[3];
} __packed;
struct rkvdec_sps_pps {
struct rkvdec_sps sps;
struct rkvdec_pps pps;
} __packed;
/* Data structure describing auxiliary buffer format. */
struct rkvdec_h264_priv_tbl {
s8 cabac_table[4][464][2];
struct rkvdec_h264_scaling_list scaling_list;
struct rkvdec_sps_pps param_set[256];
struct rkvdec_rps rps;
};
struct rkvdec_h264_ctx {
struct rkvdec_aux_buf priv_tbl;
struct rkvdec_h264_reflists reflists;
struct rkvdec_vdpu381_regs_h264 regs;
};
static void assemble_hw_pps(struct rkvdec_ctx *ctx,
struct rkvdec_h264_run *run)
{
struct rkvdec_h264_ctx *h264_ctx = ctx->priv;
const struct v4l2_ctrl_h264_sps *sps = run->sps;
const struct v4l2_ctrl_h264_pps *pps = run->pps;
const struct v4l2_ctrl_h264_decode_params *dec_params = run->decode_params;
const struct v4l2_h264_dpb_entry *dpb = dec_params->dpb;
struct rkvdec_h264_priv_tbl *priv_tbl = h264_ctx->priv_tbl.cpu;
struct rkvdec_sps_pps *hw_ps;
dma_addr_t scaling_list_address;
u32 scaling_distance;
u32 i;
/*
* HW read the SPS/PPS information from PPS packet index by PPS id.
* offset from the base can be calculated by PPS_id * 32 (size per PPS
* packet unit). so the driver copy SPS/PPS information to the exact PPS
* packet unit for HW accessing.
*/
hw_ps = &priv_tbl->param_set[pps->pic_parameter_set_id];
memset(hw_ps, 0, sizeof(*hw_ps));
Annotation
- Immediate include surface: `media/v4l2-h264.h`, `media/v4l2-mem2mem.h`, `rkvdec.h`, `rkvdec-cabac.h`, `rkvdec-rcb.h`, `rkvdec-h264-common.h`, `rkvdec-vdpu381-regs.h`.
- Detected declarations: `struct rkvdec_sps`, `struct rkvdec_pps`, `struct rkvdec_sps_pps`, `struct rkvdec_h264_priv_tbl`, `struct rkvdec_h264_ctx`, `function assemble_hw_pps`, `function rkvdec_write_regs`, `function config_registers`, `function rkvdec_h264_start`, `function rkvdec_h264_stop`.
- Atlas domain: Driver Families / drivers/media.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.