drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu383-h264.c
Source file repositories/reference/linux-study-clean/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu383-h264.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu383-h264.c- Extension
.c- Size
- 18121 bytes
- Lines
- 468
- Domain
- Driver Families
- Bucket
- drivers/media
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
media/v4l2-h264.hmedia/v4l2-mem2mem.hlinux/iopoll.hrkvdec-rcb.hrkvdec-cabac.hrkvdec-vdpu383-regs.hrkvdec-h264-common.hrkvdec-bitwriter.h
Detected Declarations
struct rkvdec_sps_ppsstruct rkvdec_h264_priv_tblstruct rkvdec_h264_ctxfunction assemble_hw_ppsfunction rkvdec_write_regsfunction config_registersfunction rkvdec_h264_startfunction rkvdec_h264_stopfunction rkvdec_h264_runfunction rkvdec_h264_try_ctrl
Annotated Snippet
struct rkvdec_sps_pps {
u32 info[SPS_SIZE / 8 / 4];
} __packed;
/* Data structure describing auxiliary buffer format. */
struct rkvdec_h264_priv_tbl {
s8 cabac_table[4][464][2];
struct rkvdec_h264_scaling_list scaling_list;
struct rkvdec_sps_pps param_set[256];
struct rkvdec_rps rps;
} __packed;
struct rkvdec_h264_ctx {
struct rkvdec_aux_buf priv_tbl;
struct rkvdec_h264_reflists reflists;
struct vdpu383_regs_h26x regs;
};
static void assemble_hw_pps(struct rkvdec_ctx *ctx,
struct rkvdec_h264_run *run)
{
struct rkvdec_h264_ctx *h264_ctx = ctx->priv;
const struct v4l2_ctrl_h264_sps *sps = run->sps;
const struct v4l2_ctrl_h264_pps *pps = run->pps;
const struct v4l2_ctrl_h264_decode_params *dec_params = run->decode_params;
const struct v4l2_h264_dpb_entry *dpb = dec_params->dpb;
struct rkvdec_h264_priv_tbl *priv_tbl = h264_ctx->priv_tbl.cpu;
struct rkvdec_sps_pps *hw_ps;
u32 pic_width, pic_height;
int i;
/*
* HW read the SPS/PPS information from PPS packet index by PPS id.
* offset from the base can be calculated by PPS_id * 32 (size per PPS
* packet unit). so the driver copy SPS/PPS information to the exact PPS
* packet unit for HW accessing.
*/
hw_ps = &priv_tbl->param_set[pps->pic_parameter_set_id];
memset(hw_ps, 0, sizeof(*hw_ps));
/* write sps */
rkvdec_set_bw_field(hw_ps->info, SEQ_PARAMETER_SET_ID, sps->seq_parameter_set_id);
rkvdec_set_bw_field(hw_ps->info, PROFILE_IDC, sps->profile_idc);
rkvdec_set_bw_field(hw_ps->info, CONSTRAINT_SET3_FLAG,
!!(sps->constraint_set_flags & (1 << 3)));
rkvdec_set_bw_field(hw_ps->info, CHROMA_FORMAT_IDC, sps->chroma_format_idc);
rkvdec_set_bw_field(hw_ps->info, BIT_DEPTH_LUMA, sps->bit_depth_luma_minus8);
rkvdec_set_bw_field(hw_ps->info, BIT_DEPTH_CHROMA, sps->bit_depth_chroma_minus8);
rkvdec_set_bw_field(hw_ps->info, QPPRIME_Y_ZERO_TRANSFORM_BYPASS_FLAG,
!!(sps->flags & V4L2_H264_SPS_FLAG_QPPRIME_Y_ZERO_TRANSFORM_BYPASS));
rkvdec_set_bw_field(hw_ps->info, LOG2_MAX_FRAME_NUM_MINUS4,
sps->log2_max_frame_num_minus4);
rkvdec_set_bw_field(hw_ps->info, MAX_NUM_REF_FRAMES, sps->max_num_ref_frames);
rkvdec_set_bw_field(hw_ps->info, PIC_ORDER_CNT_TYPE, sps->pic_order_cnt_type);
rkvdec_set_bw_field(hw_ps->info, LOG2_MAX_PIC_ORDER_CNT_LSB_MINUS4,
sps->log2_max_pic_order_cnt_lsb_minus4);
rkvdec_set_bw_field(hw_ps->info, DELTA_PIC_ORDER_ALWAYS_ZERO_FLAG,
!!(sps->flags & V4L2_H264_SPS_FLAG_DELTA_PIC_ORDER_ALWAYS_ZERO));
rkvdec_set_bw_field(hw_ps->info, MVC_EXTENSION_ENABLE, 0);
rkvdec_set_bw_field(hw_ps->info, NUM_VIEWS, 0);
/*
* Use the SPS values since they are already in macroblocks
* dimensions, height can be field height (halved) if
* V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY is not set and also it allows
* decoding smaller images into larger allocation which can be used
* to implementing SVC spatial layer support.
*/
pic_width = 16 * (sps->pic_width_in_mbs_minus1 + 1);
pic_height = 16 * (sps->pic_height_in_map_units_minus1 + 1);
if (!(sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY))
pic_height *= 2;
if (!!(dec_params->flags & V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC))
pic_height /= 2;
rkvdec_set_bw_field(hw_ps->info, PIC_WIDTH_IN_MBS, pic_width);
rkvdec_set_bw_field(hw_ps->info, PIC_HEIGHT_IN_MBS, pic_height);
rkvdec_set_bw_field(hw_ps->info, FRAME_MBS_ONLY_FLAG,
!!(sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY));
rkvdec_set_bw_field(hw_ps->info, MB_ADAPTIVE_FRAME_FIELD_FLAG,
!!(sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD));
rkvdec_set_bw_field(hw_ps->info, DIRECT_8X8_INFERENCE_FLAG,
!!(sps->flags & V4L2_H264_SPS_FLAG_DIRECT_8X8_INFERENCE));
/* write pps */
rkvdec_set_bw_field(hw_ps->info, PIC_PARAMETER_SET_ID, pps->pic_parameter_set_id);
rkvdec_set_bw_field(hw_ps->info, PPS_SEQ_PARAMETER_SET_ID, pps->seq_parameter_set_id);
rkvdec_set_bw_field(hw_ps->info, ENTROPY_CODING_MODE_FLAG,
!!(pps->flags & V4L2_H264_PPS_FLAG_ENTROPY_CODING_MODE));
Annotation
- Immediate include surface: `media/v4l2-h264.h`, `media/v4l2-mem2mem.h`, `linux/iopoll.h`, `rkvdec-rcb.h`, `rkvdec-cabac.h`, `rkvdec-vdpu383-regs.h`, `rkvdec-h264-common.h`, `rkvdec-bitwriter.h`.
- Detected declarations: `struct rkvdec_sps_pps`, `struct rkvdec_h264_priv_tbl`, `struct rkvdec_h264_ctx`, `function assemble_hw_pps`, `function rkvdec_write_regs`, `function config_registers`, `function rkvdec_h264_start`, `function rkvdec_h264_stop`, `function rkvdec_h264_run`, `function rkvdec_h264_try_ctrl`.
- Atlas domain: Driver Families / drivers/media.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.