drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos3250.c

Source file repositories/reference/linux-study-clean/drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos3250.c

File Facts

System
Linux kernel
Corpus path
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos3250.c
Extension
.c
Size
11662 bytes
Lines
482
Domain
Driver Families
Bucket
drivers/media
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only
/* linux/drivers/media/platform/exynos3250-jpeg/jpeg-hw.h
 *
 * Copyright (c) 2014 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 *
 * Author: Jacek Anaszewski <j.anaszewski@samsung.com>
 */

#include <linux/io.h>
#include <linux/videodev2.h>
#include <linux/delay.h>

#include "jpeg-core.h"
#include "jpeg-regs.h"
#include "jpeg-hw-exynos3250.h"

void exynos3250_jpeg_reset(void __iomem *regs)
{
	u32 reg = 1;
	int count = 1000;

	writel(1, regs + EXYNOS3250_SW_RESET);
	/* no other way but polling for when JPEG IP becomes operational */
	while (reg != 0 && --count > 0) {
		udelay(1);
		cpu_relax();
		reg = readl(regs + EXYNOS3250_SW_RESET);
	}

	reg = 0;
	count = 1000;

	while (reg != 1 && --count > 0) {
		writel(1, regs + EXYNOS3250_JPGDRI);
		udelay(1);
		cpu_relax();
		reg = readl(regs + EXYNOS3250_JPGDRI);
	}

	writel(0, regs + EXYNOS3250_JPGDRI);
}

void exynos3250_jpeg_poweron(void __iomem *regs)
{
	writel(EXYNOS3250_POWER_ON, regs + EXYNOS3250_JPGCLKCON);
}

void exynos3250_jpeg_set_dma_num(void __iomem *regs)
{
	writel(((EXYNOS3250_DMA_MO_COUNT << EXYNOS3250_WDMA_ISSUE_NUM_SHIFT) &
			EXYNOS3250_WDMA_ISSUE_NUM_MASK) |
	       ((EXYNOS3250_DMA_MO_COUNT << EXYNOS3250_RDMA_ISSUE_NUM_SHIFT) &
			EXYNOS3250_RDMA_ISSUE_NUM_MASK) |
	       ((EXYNOS3250_DMA_MO_COUNT << EXYNOS3250_ISSUE_GATHER_NUM_SHIFT) &
			EXYNOS3250_ISSUE_GATHER_NUM_MASK),
		regs + EXYNOS3250_DMA_ISSUE_NUM);
}

void exynos3250_jpeg_clk_set(void __iomem *base)
{
	u32 reg;

	reg = readl(base + EXYNOS3250_JPGCMOD) & ~EXYNOS3250_HALF_EN_MASK;

	writel(reg | EXYNOS3250_HALF_EN, base + EXYNOS3250_JPGCMOD);
}

void exynos3250_jpeg_input_raw_fmt(void __iomem *regs, unsigned int fmt)
{
	u32 reg;

	reg = readl(regs + EXYNOS3250_JPGCMOD) &
			EXYNOS3250_MODE_Y16_MASK;

	switch (fmt) {
	case V4L2_PIX_FMT_RGB32:
		reg |= EXYNOS3250_MODE_SEL_ARGB8888;
		break;
	case V4L2_PIX_FMT_BGR32:
		reg |= EXYNOS3250_MODE_SEL_ARGB8888 | EXYNOS3250_SRC_SWAP_RGB;
		break;
	case V4L2_PIX_FMT_RGB565:
		reg |= EXYNOS3250_MODE_SEL_RGB565;
		break;
	case V4L2_PIX_FMT_RGB565X:
		reg |= EXYNOS3250_MODE_SEL_RGB565 | EXYNOS3250_SRC_SWAP_RGB;
		break;
	case V4L2_PIX_FMT_YUYV:
		reg |= EXYNOS3250_MODE_SEL_422_1P_LUM_CHR;

Annotation

Implementation Notes