drivers/media/platform/samsung/s5p-mfc/s5p_mfc.c
Source file repositories/reference/linux-study-clean/drivers/media/platform/samsung/s5p-mfc/s5p_mfc.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/media/platform/samsung/s5p-mfc/s5p_mfc.c- Extension
.c- Size
- 48911 bytes
- Lines
- 1754
- Domain
- Driver Families
- Bucket
- drivers/media
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/delay.hlinux/interrupt.hlinux/io.hlinux/module.hlinux/platform_device.hlinux/sched.hlinux/slab.hlinux/videodev2.hmedia/v4l2-event.hlinux/workqueue.hlinux/of.hlinux/of_device.hlinux/of_reserved_mem.hmedia/videobuf2-v4l2.hs5p_mfc_common.hs5p_mfc_ctrl.hs5p_mfc_debug.hs5p_mfc_dec.hs5p_mfc_enc.hs5p_mfc_intr.hs5p_mfc_iommu.hs5p_mfc_opr.hs5p_mfc_cmd.hs5p_mfc_pm.h
Detected Declarations
function clear_work_bitfunction set_work_bitfunction clear_work_bit_irqsavefunction set_work_bit_irqsavefunction s5p_mfc_get_new_ctxfunction wake_up_ctxfunction wake_up_devfunction s5p_mfc_cleanup_queuefunction s5p_mfc_watchdogfunction s5p_mfc_watchdog_workerfunction s5p_mfc_handle_frame_all_extractedfunction s5p_mfc_handle_frame_copy_timefunction s5p_mfc_handle_frame_newfunction s5p_mfc_handle_framefunction s5p_mfc_handle_errorfunction s5p_mfc_handle_seq_donefunction s5p_mfc_handle_init_buffersfunction s5p_mfc_handle_stream_completefunction s5p_mfc_irqfunction s5p_mfc_openfunction s5p_mfc_releasefunction s5p_mfc_pollfunction s5p_mfc_mmapfunction s5p_mfc_memdev_releasefunction s5p_mfc_configure_2port_memoryfunction s5p_mfc_unconfigure_2port_memoryfunction s5p_mfc_configure_common_memoryfunction usedfunction s5p_mfc_unconfigure_common_memoryfunction s5p_mfc_configure_dma_memoryfunction s5p_mfc_unconfigure_dma_memoryfunction s5p_mfc_probefunction s5p_mfc_removefunction s5p_mfc_suspendfunction s5p_mfc_resume
Annotated Snippet
if (device_add(child) == 0) {
ret = of_reserved_mem_device_init_by_idx(child, dev->of_node,
idx);
if (ret == 0)
return child;
device_del(child);
}
err:
put_device(child);
return NULL;
}
static int s5p_mfc_configure_2port_memory(struct s5p_mfc_dev *mfc_dev)
{
struct device *dev = &mfc_dev->plat_dev->dev;
void *bank2_virt;
dma_addr_t bank2_dma_addr;
unsigned long align_size = 1 << MFC_BASE_ALIGN_ORDER;
int ret;
/*
* Create and initialize virtual devices for accessing
* reserved memory regions.
*/
mfc_dev->mem_dev[BANK_L_CTX] = s5p_mfc_alloc_memdev(dev, "left",
BANK_L_CTX);
if (!mfc_dev->mem_dev[BANK_L_CTX])
return -ENODEV;
mfc_dev->mem_dev[BANK_R_CTX] = s5p_mfc_alloc_memdev(dev, "right",
BANK_R_CTX);
if (!mfc_dev->mem_dev[BANK_R_CTX]) {
device_unregister(mfc_dev->mem_dev[BANK_L_CTX]);
return -ENODEV;
}
/* Allocate memory for firmware and initialize both banks addresses */
ret = s5p_mfc_alloc_firmware(mfc_dev);
if (ret) {
device_unregister(mfc_dev->mem_dev[BANK_R_CTX]);
device_unregister(mfc_dev->mem_dev[BANK_L_CTX]);
return ret;
}
mfc_dev->dma_base[BANK_L_CTX] = mfc_dev->fw_buf.dma;
bank2_virt = dma_alloc_coherent(mfc_dev->mem_dev[BANK_R_CTX],
align_size, &bank2_dma_addr, GFP_KERNEL);
if (!bank2_virt) {
s5p_mfc_release_firmware(mfc_dev);
device_unregister(mfc_dev->mem_dev[BANK_R_CTX]);
device_unregister(mfc_dev->mem_dev[BANK_L_CTX]);
return -ENOMEM;
}
/* Valid buffers passed to MFC encoder with LAST_FRAME command
* should not have address of bank2 - MFC will treat it as a null frame.
* To avoid such situation we set bank2 address below the pool address.
*/
mfc_dev->dma_base[BANK_R_CTX] = bank2_dma_addr - align_size;
dma_free_coherent(mfc_dev->mem_dev[BANK_R_CTX], align_size, bank2_virt,
bank2_dma_addr);
vb2_dma_contig_set_max_seg_size(mfc_dev->mem_dev[BANK_L_CTX],
DMA_BIT_MASK(32));
vb2_dma_contig_set_max_seg_size(mfc_dev->mem_dev[BANK_R_CTX],
DMA_BIT_MASK(32));
return 0;
}
static void s5p_mfc_unconfigure_2port_memory(struct s5p_mfc_dev *mfc_dev)
{
device_unregister(mfc_dev->mem_dev[BANK_L_CTX]);
device_unregister(mfc_dev->mem_dev[BANK_R_CTX]);
vb2_dma_contig_clear_max_seg_size(mfc_dev->mem_dev[BANK_L_CTX]);
vb2_dma_contig_clear_max_seg_size(mfc_dev->mem_dev[BANK_R_CTX]);
}
static int s5p_mfc_configure_common_memory(struct s5p_mfc_dev *mfc_dev)
{
struct device *dev = &mfc_dev->plat_dev->dev;
unsigned long mem_size = SZ_4M;
if (IS_ENABLED(CONFIG_DMA_CMA) || exynos_is_iommu_available(dev))
mem_size = SZ_8M;
if (mfc_mem_size)
mem_size = memparse(mfc_mem_size, NULL);
Annotation
- Immediate include surface: `linux/clk.h`, `linux/delay.h`, `linux/interrupt.h`, `linux/io.h`, `linux/module.h`, `linux/platform_device.h`, `linux/sched.h`, `linux/slab.h`.
- Detected declarations: `function clear_work_bit`, `function set_work_bit`, `function clear_work_bit_irqsave`, `function set_work_bit_irqsave`, `function s5p_mfc_get_new_ctx`, `function wake_up_ctx`, `function wake_up_dev`, `function s5p_mfc_cleanup_queue`, `function s5p_mfc_watchdog`, `function s5p_mfc_watchdog_worker`.
- Atlas domain: Driver Families / drivers/media.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.