drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
Source file repositories/reference/linux-study-clean/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c- Extension
.c- Size
- 83894 bytes
- Lines
- 2714
- Domain
- Driver Families
- Bucket
- drivers/media
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/delay.hlinux/mm.hlinux/io.hlinux/jiffies.hlinux/firmware.hlinux/err.hlinux/sched.hlinux/dma-mapping.hasm/cacheflush.hs5p_mfc_common.hs5p_mfc_cmd.hs5p_mfc_intr.hs5p_mfc_pm.hs5p_mfc_debug.hs5p_mfc_opr.hs5p_mfc_opr_v6.h
Detected Declarations
function s5p_mfc_alloc_dec_temp_buffers_v6function s5p_mfc_release_dec_desc_buffer_v6function s5p_mfc_release_codec_buffers_v6function s5p_mfc_alloc_instance_buffer_v6function s5p_mfc_release_instance_buffer_v6function s5p_mfc_alloc_dev_context_buffer_v6function s5p_mfc_release_dev_context_buffer_v6function calc_planefunction s5p_mfc_dec_calc_dpb_size_v6function s5p_mfc_enc_calc_src_size_v6function s5p_mfc_set_dec_stream_buffer_v6function s5p_mfc_set_dec_frame_buffer_v6function s5p_mfc_set_enc_stream_buffer_v6function s5p_mfc_set_enc_frame_buffer_v6function s5p_mfc_get_enc_frame_buffer_v6function s5p_mfc_set_enc_ref_buffer_v6function s5p_mfc_set_slice_modefunction s5p_mfc_set_enc_paramsfunction s5p_mfc_set_enc_params_h264function s5p_mfc_set_enc_params_mpeg4function s5p_mfc_set_enc_params_h263function s5p_mfc_set_enc_params_vp8function s5p_mfc_set_enc_params_hevcfunction s5p_mfc_init_decode_v6function s5p_mfc_set_flushfunction s5p_mfc_decode_one_frame_v6function s5p_mfc_init_encode_v6function s5p_mfc_h264_set_aso_slice_order_v6function s5p_mfc_encode_one_frame_v6function s5p_mfc_run_dec_last_framesfunction s5p_mfc_run_dec_framefunction s5p_mfc_run_enc_framefunction s5p_mfc_run_init_decfunction s5p_mfc_run_init_encfunction s5p_mfc_run_init_dec_buffersfunction s5p_mfc_run_init_enc_buffersfunction s5p_mfc_try_run_v6function s5p_mfc_clear_int_flags_v6function s5p_mfc_read_info_v6function s5p_mfc_get_dspl_y_adr_v6function s5p_mfc_get_dec_y_adr_v6function s5p_mfc_get_dspl_status_v6function s5p_mfc_get_dec_status_v6function s5p_mfc_get_dec_frame_type_v6function s5p_mfc_get_disp_frame_type_v6function s5p_mfc_get_consumed_stream_v6function s5p_mfc_get_int_reason_v6function s5p_mfc_get_int_err_v6
Annotated Snippet
if (IS_MFCV12(dev)) {
lcu_width = S5P_MFC_LCU_WIDTH(ctx->img_width);
lcu_height = S5P_MFC_LCU_HEIGHT(ctx->img_height);
if (ctx->codec_mode == S5P_FIMV_CODEC_HEVC_ENC && ctx->is_10bit) {
ctx->luma_dpb_size =
width64 * height32 +
ALIGN(DIV_ROUND_UP(lcu_width * 32, 4), 16) * height32 + 128;
if (ctx->is_422)
ctx->chroma_dpb_size =
ctx->luma_dpb_size;
else
ctx->chroma_dpb_size =
width64 * height32 / 2 +
ALIGN(DIV_ROUND_UP(lcu_width *
32, 4), 16) * height32 / 2 + 128;
} else if (ctx->codec_mode == S5P_FIMV_CODEC_VP9_ENC && ctx->is_10bit) {
ctx->luma_dpb_size =
ALIGN(ctx->img_width * 2, 128) * height32 + 64;
ctx->chroma_dpb_size =
ALIGN(ctx->img_width * 2, 128) * height32 / 2 + 64;
} else {
ctx->luma_dpb_size =
width64 * height32 + 64;
if (ctx->is_422)
ctx->chroma_dpb_size =
ctx->luma_dpb_size;
else
ctx->chroma_dpb_size =
width64 * height32 / 2 + 64;
}
ctx->luma_dpb_size = ALIGN(ctx->luma_dpb_size + 256, SZ_2K);
ctx->chroma_dpb_size = ALIGN(ctx->chroma_dpb_size + 256, SZ_2K);
} else if (IS_MFCV10_PLUS(dev)) {
lcu_width = S5P_MFC_LCU_WIDTH(ctx->img_width);
lcu_height = S5P_MFC_LCU_HEIGHT(ctx->img_height);
if (ctx->codec_mode != S5P_FIMV_CODEC_HEVC_ENC) {
ctx->luma_dpb_size =
ALIGN((mb_width * 16), 64)
* ALIGN((mb_height * 16), 32)
+ 64;
ctx->chroma_dpb_size =
ALIGN((mb_width * 16), 64)
* (mb_height * 8)
+ 64;
} else {
ctx->luma_dpb_size =
ALIGN((lcu_width * 32), 64)
* ALIGN((lcu_height * 32), 32)
+ 64;
ctx->chroma_dpb_size =
ALIGN((lcu_width * 32), 64)
* (lcu_height * 16)
+ 64;
}
} else {
ctx->luma_dpb_size = ALIGN((mb_width * mb_height) *
S5P_FIMV_LUMA_MB_TO_PIXEL_V6,
S5P_FIMV_LUMA_DPB_BUFFER_ALIGN_V6);
ctx->chroma_dpb_size = ALIGN((mb_width * mb_height) *
S5P_FIMV_CHROMA_MB_TO_PIXEL_V6,
S5P_FIMV_CHROMA_DPB_BUFFER_ALIGN_V6);
}
if (IS_MFCV8_PLUS(dev))
ctx->me_buffer_size = ALIGN(S5P_FIMV_ME_BUFFER_SIZE_V8(
ctx->img_width, ctx->img_height,
mb_width, mb_height),
S5P_FIMV_ME_BUFFER_ALIGN_V6);
else
ctx->me_buffer_size = ALIGN(S5P_FIMV_ME_BUFFER_SIZE_V6(
ctx->img_width, ctx->img_height,
mb_width, mb_height),
S5P_FIMV_ME_BUFFER_ALIGN_V6);
mfc_debug(2, "recon luma size: %zu chroma size: %zu\n",
ctx->luma_dpb_size, ctx->chroma_dpb_size);
} else {
return -EINVAL;
}
/* Codecs have different memory requirements */
switch (ctx->codec_mode) {
case S5P_MFC_CODEC_H264_DEC:
case S5P_MFC_CODEC_H264_MVC_DEC:
if (IS_MFCV10_PLUS(dev))
mfc_debug(2, "Use min scratch buffer size\n");
else if (IS_MFCV8_PLUS(dev))
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_H264_DEC_V8(
mb_width,
mb_height);
Annotation
- Immediate include surface: `linux/delay.h`, `linux/mm.h`, `linux/io.h`, `linux/jiffies.h`, `linux/firmware.h`, `linux/err.h`, `linux/sched.h`, `linux/dma-mapping.h`.
- Detected declarations: `function s5p_mfc_alloc_dec_temp_buffers_v6`, `function s5p_mfc_release_dec_desc_buffer_v6`, `function s5p_mfc_release_codec_buffers_v6`, `function s5p_mfc_alloc_instance_buffer_v6`, `function s5p_mfc_release_instance_buffer_v6`, `function s5p_mfc_alloc_dev_context_buffer_v6`, `function s5p_mfc_release_dev_context_buffer_v6`, `function calc_plane`, `function s5p_mfc_dec_calc_dpb_size_v6`, `function s5p_mfc_enc_calc_src_size_v6`.
- Atlas domain: Driver Families / drivers/media.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.