drivers/media/platform/synopsys/dw-mipi-csi2rx.c

Source file repositories/reference/linux-study-clean/drivers/media/platform/synopsys/dw-mipi-csi2rx.c

File Facts

System
Linux kernel
Corpus path
drivers/media/platform/synopsys/dw-mipi-csi2rx.c
Extension
.c
Size
27561 bytes
Lines
1064
Domain
Driver Families
Bucket
drivers/media
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct dw_mipi_csi2rx_drvdata {
	const u32 *regs;
	void (*dphy_assert_reset)(struct dw_mipi_csi2rx_device *csi2);
	void (*dphy_deassert_reset)(struct dw_mipi_csi2rx_device *csi2);
	void (*ipi_enable)(struct dw_mipi_csi2rx_device *csi2);
	int (*wait_for_phy_stopstate)(struct dw_mipi_csi2rx_device *csi2);
};

struct dw_mipi_csi2rx_format {
	u32 code;
	u8 depth;
	u8 csi_dt;
};

struct dw_mipi_csi2rx_device {
	struct device *dev;

	void __iomem *base_addr;
	struct clk_bulk_data *clks;
	unsigned int clks_num;
	struct phy *phy;
	struct reset_control *reset;

	const struct dw_mipi_csi2rx_format *formats;
	unsigned int formats_num;

	struct media_pad pads[DW_MIPI_CSI2RX_PAD_MAX];
	struct v4l2_async_notifier notifier;
	struct v4l2_subdev sd;

	enum v4l2_mbus_type bus_type;
	u32 lanes_num;
	u64 enabled_streams;

	const struct dw_mipi_csi2rx_drvdata *drvdata;
};

static const u32 rk3568_regs[DW_MIPI_CSI2RX_MAX] = {
	[DW_MIPI_CSI2RX_N_LANES] = DW_REG(0x4),
	[DW_MIPI_CSI2RX_RESETN] = DW_REG(0x10),
	[DW_MIPI_CSI2RX_PHY_STATE] = DW_REG(0x14),
	[DW_MIPI_CSI2RX_ERR1] = DW_REG(0x20),
	[DW_MIPI_CSI2RX_ERR2] = DW_REG(0x24),
	[DW_MIPI_CSI2RX_MSK1] = DW_REG(0x28),
	[DW_MIPI_CSI2RX_MSK2] = DW_REG(0x2c),
	[DW_MIPI_CSI2RX_CONTROL] = DW_REG(0x40),
};

static const struct dw_mipi_csi2rx_drvdata rk3568_drvdata = {
	.regs = rk3568_regs,
};

static const u32 imx93_regs[DW_MIPI_CSI2RX_MAX] = {
	[DW_MIPI_CSI2RX_N_LANES] = DW_REG(0x4),
	[DW_MIPI_CSI2RX_RESETN] = DW_REG(0x8),
	[DW_MIPI_CSI2RX_PHY_SHUTDOWNZ] = DW_REG(0x40),
	[DW_MIPI_CSI2RX_DPHY_RSTZ] = DW_REG(0x44),
	[DW_MIPI_CSI2RX_PHY_STATE] = DW_REG(0x48),
	[DW_MIPI_CSI2RX_PHY_STOPSTATE] = DW_REG(0x4c),
	[DW_MIPI_CSI2RX_PHY_TST_CTRL0] = DW_REG(0x50),
	[DW_MIPI_CSI2RX_PHY_TST_CTRL1] = DW_REG(0x54),
	[DW_MIPI_CSI2RX_IPI_MODE] = DW_REG(0x80),
	[DW_MIPI_CSI2RX_IPI_VCID] = DW_REG(0x84),
	[DW_MIPI_CSI2RX_IPI_DATATYPE] = DW_REG(0x88),
	[DW_MIPI_CSI2RX_IPI_MEM_FLUSH] = DW_REG(0x8c),
	[DW_MIPI_CSI2RX_IPI_SOFTRSTN] = DW_REG(0xa0),
};

static const u32 imx95_regs[DW_MIPI_CSI2RX_MAX] = {
	[DW_MIPI_CSI2RX_N_LANES] = DW_REG(0x4),
	[DW_MIPI_CSI2RX_RESETN] = DW_REG(0x8),
	[DW_MIPI_CSI2RX_PHY_SHUTDOWNZ] = DW_REG(0x40),
	[DW_MIPI_CSI2RX_DPHY_RSTZ] = DW_REG(0x44),
	[DW_MIPI_CSI2RX_PHY_STATE] = DW_REG(0x48),
	[DW_MIPI_CSI2RX_PHY_STOPSTATE] = DW_REG(0x4c),
	[DW_MIPI_CSI2RX_PHY_TST_CTRL0] = DW_REG(0x50),
	[DW_MIPI_CSI2RX_PHY_TST_CTRL1] = DW_REG(0x54),
};

static const struct v4l2_mbus_framefmt default_format = {
	.width = 3840,
	.height = 2160,
	.code = MEDIA_BUS_FMT_SRGGB10_1X10,
	.field = V4L2_FIELD_NONE,
	.colorspace = V4L2_COLORSPACE_RAW,
	.ycbcr_enc = V4L2_YCBCR_ENC_601,
	.quantization = V4L2_QUANTIZATION_FULL_RANGE,
	.xfer_func = V4L2_XFER_FUNC_NONE,
};

Annotation

Implementation Notes