drivers/media/platform/synopsys/hdmirx/snps_hdmirx.h

Source file repositories/reference/linux-study-clean/drivers/media/platform/synopsys/hdmirx/snps_hdmirx.h

File Facts

System
Linux kernel
Corpus path
drivers/media/platform/synopsys/hdmirx/snps_hdmirx.h
Extension
.h
Size
14395 bytes
Lines
399
Domain
Driver Families
Bucket
drivers/media
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef DW_HDMIRX_H
#define DW_HDMIRX_H

#include <linux/bitfield.h>
#include <linux/bitops.h>
#include <linux/hw_bitfield.h>

#define UPDATE(x, h, l)		FIELD_PREP(GENMASK((h), (l)), (x))
#define HIWORD_UPDATE(v, h, l)	FIELD_PREP_WM16(GENMASK((h), (l)), (v))

/* SYS_GRF */
#define SYS_GRF_SOC_CON1			0x0304
#define HDMIRXPHY_SRAM_EXT_LD_DONE		BIT(1)
#define HDMIRXPHY_SRAM_BYPASS			BIT(0)
#define SYS_GRF_SOC_STATUS1			0x0384
#define HDMIRXPHY_SRAM_INIT_DONE		BIT(10)
#define SYS_GRF_CHIP_ID				0x0600

/* VO1_GRF */
#define VO1_GRF_VO1_CON2			0x0008
#define HDMIRX_SDAIN_MSK			BIT(2)
#define HDMIRX_SCLIN_MSK			BIT(1)

/* HDMIRX PHY */
#define SUP_DIG_ANA_CREGS_SUP_ANA_NC			0x004f

#define	LANE0_DIG_ASIC_RX_OVRD_OUT_0			0x100f
#define	LANE1_DIG_ASIC_RX_OVRD_OUT_0			0x110f
#define	LANE2_DIG_ASIC_RX_OVRD_OUT_0			0x120f
#define	LANE3_DIG_ASIC_RX_OVRD_OUT_0			0x130f
#define ASIC_ACK_OVRD_EN				BIT(1)
#define ASIC_ACK					BIT(0)

#define	LANE0_DIG_RX_VCOCAL_RX_VCO_CAL_CTRL_2		0x104a
#define	LANE1_DIG_RX_VCOCAL_RX_VCO_CAL_CTRL_2		0x114a
#define	LANE2_DIG_RX_VCOCAL_RX_VCO_CAL_CTRL_2		0x124a
#define	LANE3_DIG_RX_VCOCAL_RX_VCO_CAL_CTRL_2		0x134a
#define FREQ_TUNE_START_VAL_MASK			GENMASK(9, 0)
#define FREQ_TUNE_START_VAL(x)				UPDATE(x, 9, 0)

#define	HDMIPCS_DIG_CTRL_PATH_MAIN_FSM_FSM_CONFIG	0x20c4
#define	HDMIPCS_DIG_CTRL_PATH_MAIN_FSM_ADAPT_REF_FOM	0x20c7
#define HDMIPCS_DIG_CTRL_PATH_MAIN_FSM_RATE_CALC_HDMI14_CDR_SETTING_3_REG	0x20e9
#define CDR_SETTING_BOUNDARY_3_DEFAULT			0x52da
#define HDMIPCS_DIG_CTRL_PATH_MAIN_FSM_RATE_CALC_HDMI14_CDR_SETTING_4_REG	0x20ea
#define CDR_SETTING_BOUNDARY_4_DEFAULT			0x43cd
#define HDMIPCS_DIG_CTRL_PATH_MAIN_FSM_RATE_CALC_HDMI14_CDR_SETTING_5_REG	0x20eb
#define CDR_SETTING_BOUNDARY_5_DEFAULT			0x35b3
#define HDMIPCS_DIG_CTRL_PATH_MAIN_FSM_RATE_CALC_HDMI14_CDR_SETTING_6_REG	0x20fb
#define	CDR_SETTING_BOUNDARY_6_DEFAULT			0x2799
#define HDMIPCS_DIG_CTRL_PATH_MAIN_FSM_RATE_CALC_HDMI14_CDR_SETTING_7_REG	0x20fc
#define CDR_SETTING_BOUNDARY_7_DEFAULT			0x1b65

#define	RAWLANE0_DIG_PCS_XF_RX_OVRD_OUT			0x300e
#define	RAWLANE1_DIG_PCS_XF_RX_OVRD_OUT			0x310e
#define	RAWLANE2_DIG_PCS_XF_RX_OVRD_OUT			0x320e
#define	RAWLANE3_DIG_PCS_XF_RX_OVRD_OUT			0x330e
#define PCS_ACK_WRITE_SELECT				BIT(14)
#define PCS_EN_CTL					BIT(1)
#define PCS_ACK						BIT(0)

#define	RAWLANE0_DIG_AON_FAST_FLAGS			0x305c
#define	RAWLANE1_DIG_AON_FAST_FLAGS			0x315c
#define	RAWLANE2_DIG_AON_FAST_FLAGS			0x325c
#define	RAWLANE3_DIG_AON_FAST_FLAGS			0x335c

/* HDMIRX Ctrler */
#define GLOBAL_SWRESET_REQUEST			0x0020
#define DATAPATH_SWRESETREQ			BIT(12)
#define GLOBAL_SWENABLE				0x0024
#define PHYCTRL_ENABLE				BIT(21)
#define CEC_ENABLE				BIT(16)
#define TMDS_ENABLE				BIT(13)
#define DATAPATH_ENABLE				BIT(12)
#define PKTFIFO_ENABLE				BIT(11)
#define AVPUNIT_ENABLE				BIT(8)
#define MAIN_ENABLE				BIT(0)
#define GLOBAL_TIMER_REF_BASE			0x0028
#define CORE_CONFIG				0x0050
#define CMU_CONFIG0				0x0060
#define TMDSQPCLK_STABLE_FREQ_MARGIN_MASK	GENMASK(30, 16)
#define TMDSQPCLK_STABLE_FREQ_MARGIN(x)		UPDATE(x, 30, 16)
#define AUDCLK_STABLE_FREQ_MARGIN_MASK		GENMASK(11, 9)
#define AUDCLK_STABLE_FREQ_MARGIN(x)		UPDATE(x, 11, 9)
#define CMU_STATUS				0x007c
#define TMDSQPCLK_LOCKED_ST			BIT(4)
#define CMU_TMDSQPCLK_FREQ			0x0084
#define PHY_CONFIG				0x00c0
#define LDO_AFE_PROG_MASK			GENMASK(24, 23)
#define LDO_AFE_PROG(x)				UPDATE(x, 24, 23)

Annotation

Implementation Notes