drivers/media/platform/ti/vpe/vip.c

Source file repositories/reference/linux-study-clean/drivers/media/platform/ti/vpe/vip.c

File Facts

System: Linux kernel
Corpus path: drivers/media/platform/ti/vpe/vip.c
Extension: .c
Size: 99693 bytes
Lines: 3675
Domain: Driver Families
Bucket: drivers/media
Inferred role: Driver Families: implementation source
Status: source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
Touches IRQ or DMA behavior; this matters for the representative real-device path.
Allocates kernel memory; connect allocation flags and lifetime to context constraints.
Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

linux/clk.h
linux/cleanup.h
linux/delay.h
linux/dma-mapping.h
linux/err.h
linux/interrupt.h
linux/module.h
linux/workqueue.h
linux/pm_runtime.h
linux/sched.h
linux/mfd/syscon.h
linux/regmap.h
linux/pinctrl/consumer.h
linux/of_device.h
linux/of_graph.h
vip.h

Detected Declarations

struct vip_srce_info
struct vip_mmr_adb
function vip_init_format_info
function vip_is_mbuscode_yuv
function vip_is_mbuscode_rgb
function vip_is_mbuscode_raw
function vip_mbus_code_to_fourcc
function vip_csc_direction
function insert_field
function init_adb_hdrs
function vip_module_toggle
function vip_set_clock_enable
function vip_shared_set_clock_enable
function vip_top_reset
function vip_top_vpdma_reset
function vip_set_pclk_invert
function vip_set_data_interface
function vip_set_slice_path
function add_out_dtd
function add_stream_dtds
function enable_irqs
function disable_irqs
function clear_irqs
function populate_desc_list
function start_dma
function vip_schedule_next_buffer
function vip_process_buffer_complete
function vip_reset_vpdma
function vip_overflow_recovery_work
function handle_parser_irqs
function vip_irq
function vip_querycap
function vip_enuminput
function vip_g_input
function vip_s_input
function vip_querystd
function vip_g_std
function vip_s_std
function vip_enum_fmt_vid_cap
function vip_enum_framesizes
function vip_enum_frameintervals
function vip_g_parm
function vip_s_parm
function vip_calc_format_size
function vip_is_size_dma_aligned
function vip_try_fmt_vid_cap
function vip_g_fmt_vid_cap
function vip_s_fmt_vid_cap

Annotated Snippet

struct vip_srce_info {
	u8	base_channel;	/* the VPDMA channel number */
	u8	vb_index;	/* input frame f, f-1, f-2 index */
	u8	vb_part;	/* identifies section of co-planar formats */
};

static struct vip_srce_info srce_info[5] = {
	[VIP_SRCE_MULT_PORT] = {
		.base_channel	= VIP1_CHAN_NUM_MULT_PORT_A_SRC0,
		.vb_index	= 0,
		.vb_part	= VIP_CHROMA,
	},
	[VIP_SRCE_MULT_ANC] = {
		.base_channel	= VIP1_CHAN_NUM_MULT_ANC_A_SRC0,
		.vb_index	= 0,
		.vb_part	= VIP_LUMA,
	},
	[VIP_SRCE_LUMA] = {
		.base_channel	= VIP1_CHAN_NUM_PORT_A_LUMA,
		.vb_index	= 1,
		.vb_part	= VIP_LUMA,
	},
	[VIP_SRCE_CHROMA] = {
		.base_channel	= VIP1_CHAN_NUM_PORT_A_CHROMA,
		.vb_index	= 1,
		.vb_part	= VIP_CHROMA,
	},
	[VIP_SRCE_RGB] = {
		.base_channel	= VIP1_CHAN_NUM_PORT_A_RGB,
		.vb_part	= VIP_LUMA,
	},
};

static struct vip_fmt vip_formats[VIP_MAX_ACTIVE_FMT] = {
	{
		.fourcc		= V4L2_PIX_FMT_NV12,
		.code		= MEDIA_BUS_FMT_UYVY8_2X8,
		.coplanar	= 1,
		.vpdma_fmt	= { &vpdma_yuv_fmts[VPDMA_DATA_FMT_Y420],
				    &vpdma_yuv_fmts[VPDMA_DATA_FMT_C420],
				  },
	},
	{
		.fourcc		= V4L2_PIX_FMT_UYVY,
		.code		= MEDIA_BUS_FMT_UYVY8_2X8,
		.coplanar	= 0,
		.vpdma_fmt	= { &vpdma_yuv_fmts[VPDMA_DATA_FMT_CBY422],
				  },
	},
	{
		.fourcc		= V4L2_PIX_FMT_YUYV,
		.code		= MEDIA_BUS_FMT_UYVY8_2X8,
		.coplanar	= 0,
		.vpdma_fmt	= { &vpdma_yuv_fmts[VPDMA_DATA_FMT_YCB422],
				  },
	},
	{
		.fourcc		= V4L2_PIX_FMT_VYUY,
		.code		= MEDIA_BUS_FMT_UYVY8_2X8,
		.coplanar	= 0,
		.vpdma_fmt	= { &vpdma_yuv_fmts[VPDMA_DATA_FMT_CRY422],
				  },
	},
	{
		.fourcc		= V4L2_PIX_FMT_YVYU,
		.code		= MEDIA_BUS_FMT_UYVY8_2X8,
		.coplanar	= 0,
		.vpdma_fmt	= { &vpdma_yuv_fmts[VPDMA_DATA_FMT_YCR422],
				  },
	},
	{
		.fourcc		= V4L2_PIX_FMT_RGB24,
		.code		= MEDIA_BUS_FMT_UYVY8_2X8,
		.coplanar	= 0,
		.vpdma_fmt	= { &vpdma_rgb_fmts[VPDMA_DATA_FMT_RGB24],
				  },
	},
	{
		.fourcc		= V4L2_PIX_FMT_RGB32,
		.code		= MEDIA_BUS_FMT_UYVY8_2X8,
		.coplanar	= 0,
		.vpdma_fmt	= { &vpdma_rgb_fmts[VPDMA_DATA_FMT_ARGB32],
				  },
	},
	{
		.fourcc		= V4L2_PIX_FMT_BGR24,
		.code		= MEDIA_BUS_FMT_UYVY8_2X8,
		.coplanar	= 0,
		.vpdma_fmt	= { &vpdma_rgb_fmts[VPDMA_DATA_FMT_BGR24],
				  },

Annotation

Immediate include surface: `linux/clk.h`, `linux/cleanup.h`, `linux/delay.h`, `linux/dma-mapping.h`, `linux/err.h`, `linux/interrupt.h`, `linux/module.h`, `linux/workqueue.h`.
Detected declarations: `struct vip_srce_info`, `struct vip_mmr_adb`, `function vip_init_format_info`, `function vip_is_mbuscode_yuv`, `function vip_is_mbuscode_rgb`, `function vip_is_mbuscode_raw`, `function vip_mbus_code_to_fourcc`, `function vip_csc_direction`, `function insert_field`, `function init_adb_hdrs`.
Atlas domain: Driver Families / drivers/media.
Implementation status: source implementation candidate.
Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.