drivers/media/platform/ti/vpe/vpdma.c
Source file repositories/reference/linux-study-clean/drivers/media/platform/ti/vpe/vpdma.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/media/platform/ti/vpe/vpdma.c- Extension
.c- Size
- 31615 bytes
- Lines
- 1195
- Domain
- Driver Families
- Bucket
- drivers/media
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/delay.hlinux/dma-mapping.hlinux/err.hlinux/firmware.hlinux/io.hlinux/module.hlinux/platform_device.hlinux/sched.hlinux/slab.hlinux/videodev2.hvpdma.hvpdma_priv.h
Detected Declarations
struct vpdma_channel_infofunction read_regfunction write_regfunction read_field_regfunction write_field_regfunction vpdma_dump_regsfunction vpdma_alloc_desc_buffunction vpdma_free_desc_buffunction vpdma_map_desc_buffunction vpdma_unmap_desc_buffunction vpdma_list_cleanupfunction vpdma_create_desc_listfunction vpdma_reset_desc_listfunction vpdma_free_desc_listfunction vpdma_list_busyfunction vpdma_submit_descsfunction vpdma_update_dma_addrfunction vpdma_set_max_sizefunction dump_cfdfunction vpdma_add_cfd_blockfunction vpdma_add_cfd_adbfunction dump_ctdfunction vpdma_add_sync_on_channel_ctdfunction vpdma_add_abort_channel_ctdfunction dump_dtdfunction vpdma_add_out_dtdfunction vpdma_rawchan_add_out_dtdfunction clientfunction vpdma_hwlist_allocfunction vpdma_enable_list_complete_irqfunction vpdma_get_list_statfunction vpdma_get_list_maskfunction vpdma_clear_list_statfunction vpdma_set_bg_colorfunction mirroredfunction vpdma_set_frame_start_eventfunction vpdma_firmware_cbfunction vpdma_load_firmwarefunction vpdma_createexport vpdma_yuv_fmtsexport vpdma_rgb_fmtsexport vpdma_raw_fmtsexport vpdma_misc_fmtsexport vpdma_dump_regsexport vpdma_alloc_desc_bufexport vpdma_free_desc_bufexport vpdma_map_desc_bufexport vpdma_unmap_desc_buf
Annotated Snippet
struct vpdma_channel_info {
int num; /* VPDMA channel number */
int cstat_offset; /* client CSTAT register offset */
};
static const struct vpdma_channel_info chan_info[] = {
[VPE_CHAN_LUMA1_IN] = {
.num = VPE_CHAN_NUM_LUMA1_IN,
.cstat_offset = VPDMA_DEI_LUMA1_CSTAT,
},
[VPE_CHAN_CHROMA1_IN] = {
.num = VPE_CHAN_NUM_CHROMA1_IN,
.cstat_offset = VPDMA_DEI_CHROMA1_CSTAT,
},
[VPE_CHAN_LUMA2_IN] = {
.num = VPE_CHAN_NUM_LUMA2_IN,
.cstat_offset = VPDMA_DEI_LUMA2_CSTAT,
},
[VPE_CHAN_CHROMA2_IN] = {
.num = VPE_CHAN_NUM_CHROMA2_IN,
.cstat_offset = VPDMA_DEI_CHROMA2_CSTAT,
},
[VPE_CHAN_LUMA3_IN] = {
.num = VPE_CHAN_NUM_LUMA3_IN,
.cstat_offset = VPDMA_DEI_LUMA3_CSTAT,
},
[VPE_CHAN_CHROMA3_IN] = {
.num = VPE_CHAN_NUM_CHROMA3_IN,
.cstat_offset = VPDMA_DEI_CHROMA3_CSTAT,
},
[VPE_CHAN_MV_IN] = {
.num = VPE_CHAN_NUM_MV_IN,
.cstat_offset = VPDMA_DEI_MV_IN_CSTAT,
},
[VPE_CHAN_MV_OUT] = {
.num = VPE_CHAN_NUM_MV_OUT,
.cstat_offset = VPDMA_DEI_MV_OUT_CSTAT,
},
[VPE_CHAN_LUMA_OUT] = {
.num = VPE_CHAN_NUM_LUMA_OUT,
.cstat_offset = VPDMA_VIP_UP_Y_CSTAT,
},
[VPE_CHAN_CHROMA_OUT] = {
.num = VPE_CHAN_NUM_CHROMA_OUT,
.cstat_offset = VPDMA_VIP_UP_UV_CSTAT,
},
[VPE_CHAN_RGB_OUT] = {
.num = VPE_CHAN_NUM_RGB_OUT,
.cstat_offset = VPDMA_VIP_UP_Y_CSTAT,
},
};
static u32 read_reg(struct vpdma_data *vpdma, int offset)
{
return ioread32(vpdma->base + offset);
}
static void write_reg(struct vpdma_data *vpdma, int offset, u32 value)
{
iowrite32(value, vpdma->base + offset);
}
static int read_field_reg(struct vpdma_data *vpdma, int offset,
u32 mask, int shift)
{
return (read_reg(vpdma, offset) & (mask << shift)) >> shift;
}
static void write_field_reg(struct vpdma_data *vpdma, int offset, u32 field,
u32 mask, int shift)
{
u32 val = read_reg(vpdma, offset);
val &= ~(mask << shift);
val |= (field & mask) << shift;
write_reg(vpdma, offset, val);
}
void vpdma_dump_regs(struct vpdma_data *vpdma)
{
struct device *dev = &vpdma->pdev->dev;
#define DUMPREG(r) dev_dbg(dev, "%-35s %08x\n", #r, read_reg(vpdma, VPDMA_##r))
dev_dbg(dev, "VPDMA Registers:\n");
DUMPREG(PID);
DUMPREG(LIST_ADDR);
DUMPREG(LIST_ATTR);
Annotation
- Immediate include surface: `linux/delay.h`, `linux/dma-mapping.h`, `linux/err.h`, `linux/firmware.h`, `linux/io.h`, `linux/module.h`, `linux/platform_device.h`, `linux/sched.h`.
- Detected declarations: `struct vpdma_channel_info`, `function read_reg`, `function write_reg`, `function read_field_reg`, `function write_field_reg`, `function vpdma_dump_regs`, `function vpdma_alloc_desc_buf`, `function vpdma_free_desc_buf`, `function vpdma_map_desc_buf`, `function vpdma_unmap_desc_buf`.
- Atlas domain: Driver Families / drivers/media.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.