drivers/media/platform/verisilicon/hantro_g2.c
Source file repositories/reference/linux-study-clean/drivers/media/platform/verisilicon/hantro_g2.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/media/platform/verisilicon/hantro_g2.c- Extension
.c- Size
- 3838 bytes
- Lines
- 138
- Domain
- Driver Families
- Bucket
- drivers/media
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/delay.hhantro_hw.hhantro_g2_regs.h
Detected Declarations
function Copyrightfunction hantro_g2_resetfunction hantro_g2_irqfunction hantro_g2_chroma_offsetfunction hantro_g2_motion_vectors_offsetfunction hantro_g2_mv_sizefunction hantro_g2_luma_compress_offsetfunction hantro_g2_chroma_compress_offset
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* Hantro VPU codec driver
*
* Copyright (C) 2021 Collabora Ltd, Andrzej Pietrasiewicz <andrzej.p@collabora.com>
*/
#include <linux/delay.h>
#include "hantro_hw.h"
#include "hantro_g2_regs.h"
#define G2_ALIGN 16
static bool hantro_g2_active(struct hantro_ctx *ctx)
{
struct hantro_dev *vpu = ctx->dev;
u32 status;
status = vdpu_read(vpu, G2_REG_INTERRUPT);
return (status & G2_REG_INTERRUPT_DEC_E);
}
/**
* hantro_g2_reset:
* @ctx: the hantro context
*
* Emulates a reset using Hantro abort function. Failing this procedure would
* results in programming a running IP which leads to CPU hang.
*
* Using a hard reset procedure instead is prefferred.
*/
void hantro_g2_reset(struct hantro_ctx *ctx)
{
struct hantro_dev *vpu = ctx->dev;
u32 status;
status = vdpu_read(vpu, G2_REG_INTERRUPT);
if (status & G2_REG_INTERRUPT_DEC_E) {
dev_warn_ratelimited(vpu->dev, "device still running, aborting");
status |= G2_REG_INTERRUPT_DEC_ABORT_E | G2_REG_INTERRUPT_DEC_IRQ_DIS;
vdpu_write(vpu, status, G2_REG_INTERRUPT);
do {
mdelay(1);
} while (hantro_g2_active(ctx));
}
}
irqreturn_t hantro_g2_irq(int irq, void *dev_id)
{
struct hantro_dev *vpu = dev_id;
u32 status;
status = vdpu_read(vpu, G2_REG_INTERRUPT);
if (!(status & G2_REG_INTERRUPT_DEC_IRQ))
return IRQ_NONE;
hantro_reg_write(vpu, &g2_dec_irq, 0);
hantro_reg_write(vpu, &g2_dec_int_stat, 0);
hantro_reg_write(vpu, &g2_clk_gate_e, 1);
if (status & G2_REG_INTERRUPT_DEC_RDY_INT) {
hantro_irq_done(vpu, VB2_BUF_STATE_DONE);
return IRQ_HANDLED;
}
if (status & G2_REG_INTERRUPT_DEC_ABORT_INT) {
/* disabled on abort, though lets be safe and handle it */
dev_warn_ratelimited(vpu->dev, "decode operation aborted.");
return IRQ_HANDLED;
}
if (status & G2_REG_INTERRUPT_DEC_LAST_SLICE_INT)
dev_warn_ratelimited(vpu->dev, "not all macroblocks were decoded.");
if (status & G2_REG_INTERRUPT_DEC_BUS_INT)
dev_warn_ratelimited(vpu->dev, "bus error detected.");
if (status & G2_REG_INTERRUPT_DEC_ERROR_INT)
dev_warn_ratelimited(vpu->dev, "decode error detected.");
if (status & G2_REG_INTERRUPT_DEC_TIMEOUT)
dev_warn_ratelimited(vpu->dev, "frame decode timed out.");
/**
* If the decoding haven't stopped, let it continue. The hardware timeout
* will trigger if it is trully stuck.
*/
Annotation
- Immediate include surface: `linux/delay.h`, `hantro_hw.h`, `hantro_g2_regs.h`.
- Detected declarations: `function Copyright`, `function hantro_g2_reset`, `function hantro_g2_irq`, `function hantro_g2_chroma_offset`, `function hantro_g2_motion_vectors_offset`, `function hantro_g2_mv_size`, `function hantro_g2_luma_compress_offset`, `function hantro_g2_chroma_compress_offset`.
- Atlas domain: Driver Families / drivers/media.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.