drivers/media/platform/verisilicon/hantro_g2_regs.h

Source file repositories/reference/linux-study-clean/drivers/media/platform/verisilicon/hantro_g2_regs.h

File Facts

System
Linux kernel
Corpus path
drivers/media/platform/verisilicon/hantro_g2_regs.h
Extension
.h
Size
13491 bytes
Lines
343
Domain
Driver Families
Bucket
drivers/media
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef HANTRO_G2_REGS_H_
#define HANTRO_G2_REGS_H_

#include "hantro.h"

#define G2_SWREG(nr)	((nr) * 4)

#define G2_DEC_REG(b, s, m) \
	((const struct hantro_reg) { \
		.base = G2_SWREG(b), \
		.shift = s, \
		.mask = m, \
	})

#define G2_REG_VERSION			G2_SWREG(0)

#define G2_REG_INTERRUPT		G2_SWREG(1)
#define G2_REG_INTERRUPT_DEC_LAST_SLICE_INT	BIT(19)
#define G2_REG_INTERRUPT_DEC_TIMEOUT	BIT(18)
#define G2_REG_INTERRUPT_DEC_ERROR_INT	BIT(16)
#define G2_REG_INTERRUPT_DEC_BUF_INT	BIT(14)
#define G2_REG_INTERRUPT_DEC_BUS_INT	BIT(13)
#define G2_REG_INTERRUPT_DEC_RDY_INT	BIT(12)
#define G2_REG_INTERRUPT_DEC_ABORT_INT	BIT(11)
#define G2_REG_INTERRUPT_DEC_IRQ	BIT(8)
#define G2_REG_INTERRUPT_DEC_ABORT_E	BIT(5)
#define G2_REG_INTERRUPT_DEC_IRQ_DIS	BIT(4)
#define G2_REG_INTERRUPT_DEC_E		BIT(0)

#define HEVC_DEC_MODE			0xc
#define VP9_DEC_MODE			0xd

#define BUS_WIDTH_32			0
#define BUS_WIDTH_64			1
#define BUS_WIDTH_128			2
#define BUS_WIDTH_256			3

#define g2_dec_int_stat		G2_DEC_REG(1, 11, 0xf)
#define g2_dec_irq		G2_DEC_REG(1, 8, 0x1)

#define g2_strm_swap		G2_DEC_REG(2, 28, 0xf)
#define g2_strm_swap_old	G2_DEC_REG(2, 27, 0x1f)
#define g2_pic_swap		G2_DEC_REG(2, 22, 0x1f)
#define g2_dirmv_swap		G2_DEC_REG(2, 20, 0xf)
#define g2_dirmv_swap_old	G2_DEC_REG(2, 17, 0x1f)
#define g2_tab0_swap_old	G2_DEC_REG(2, 12, 0x1f)
#define g2_tab1_swap_old	G2_DEC_REG(2, 7, 0x1f)
#define g2_tab2_swap_old	G2_DEC_REG(2, 2, 0x1f)

#define g2_mode			G2_DEC_REG(3, 27, 0x1f)
#define g2_compress_swap	G2_DEC_REG(3, 20, 0xf)
#define g2_ref_compress_bypass	G2_DEC_REG(3, 17, 0x1)
#define g2_out_rs_e		G2_DEC_REG(3, 16, 0x1)
#define g2_out_dis		G2_DEC_REG(3, 15, 0x1)
#define g2_out_filtering_dis	G2_DEC_REG(3, 14, 0x1)
#define g2_write_mvs_e		G2_DEC_REG(3, 12, 0x1)
#define g2_tab3_swap_old	G2_DEC_REG(3, 7, 0x1f)
#define g2_rscan_swap		G2_DEC_REG(3, 2, 0x1f)

#define g2_pic_width_in_cbs	G2_DEC_REG(4, 19, 0x1fff)
#define g2_pic_height_in_cbs	G2_DEC_REG(4, 6,  0x1fff)
#define g2_num_ref_frames	G2_DEC_REG(4, 0,  0x1f)

#define g2_start_bit		G2_DEC_REG(5, 25, 0x7f)
#define g2_scaling_list_e	G2_DEC_REG(5, 24, 0x1)
#define g2_cb_qp_offset		G2_DEC_REG(5, 19, 0x1f)
#define g2_cr_qp_offset		G2_DEC_REG(5, 14, 0x1f)
#define g2_sign_data_hide	G2_DEC_REG(5, 12, 0x1)
#define g2_tempor_mvp_e		G2_DEC_REG(5, 11, 0x1)
#define g2_max_cu_qpd_depth	G2_DEC_REG(5, 5,  0x3f)
#define g2_cu_qpd_e		G2_DEC_REG(5, 4,  0x1)
#define g2_pix_shift		G2_DEC_REG(5, 0,  0xf)

#define g2_stream_len		G2_DEC_REG(6, 0,  0xffffffff)

#define g2_cabac_init_present	G2_DEC_REG(7, 31, 0x1)
#define g2_weight_pred_e	G2_DEC_REG(7, 28, 0x1)
#define g2_weight_bipr_idc	G2_DEC_REG(7, 26, 0x3)
#define g2_filter_over_slices	G2_DEC_REG(7, 25, 0x1)
#define g2_filter_over_tiles	G2_DEC_REG(7, 24, 0x1)
#define g2_asym_pred_e		G2_DEC_REG(7, 23, 0x1)
#define g2_sao_e		G2_DEC_REG(7, 22, 0x1)
#define g2_pcm_filt_d		G2_DEC_REG(7, 21, 0x1)
#define g2_slice_chqp_present	G2_DEC_REG(7, 20, 0x1)
#define g2_dependent_slice	G2_DEC_REG(7, 19, 0x1)
#define g2_filter_override	G2_DEC_REG(7, 18, 0x1)
#define g2_strong_smooth_e	G2_DEC_REG(7, 17, 0x1)
#define g2_filt_offset_beta	G2_DEC_REG(7, 12, 0x1f)
#define g2_filt_offset_tc	G2_DEC_REG(7, 7,  0x1f)
#define g2_slice_hdr_ext_e	G2_DEC_REG(7, 6,  0x1)

Annotation

Implementation Notes