drivers/media/platform/verisilicon/rockchip_vpu_hw.c
Source file repositories/reference/linux-study-clean/drivers/media/platform/verisilicon/rockchip_vpu_hw.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/media/platform/verisilicon/rockchip_vpu_hw.c- Extension
.c- Size
- 21413 bytes
- Lines
- 819
- Domain
- Driver Families
- Bucket
- drivers/media
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hhantro.hhantro_jpeg.hhantro_g1_regs.hhantro_h1_regs.hrockchip_vpu2_regs.hrockchip_vpu981_regs.h
Detected Declarations
function rockchip_vpu1_vepu_irqfunction rockchip_vpu2_vdpu_irqfunction rockchip_vpu2_vepu_irqfunction rk3588_vpu981_irqfunction rk3036_vpu_hw_initfunction rk3066_vpu_hw_initfunction rockchip_vpu_hw_initfunction rk3066_vpu_dec_resetfunction rockchip_vpu1_enc_resetfunction rockchip_vpu2_dec_resetfunction rockchip_vpu2_enc_reset
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* Hantro VPU codec driver
*
* Copyright (C) 2018 Rockchip Electronics Co., Ltd.
* Jeffy Chen <jeffy.chen@rock-chips.com>
*/
#include <linux/clk.h>
#include "hantro.h"
#include "hantro_jpeg.h"
#include "hantro_g1_regs.h"
#include "hantro_h1_regs.h"
#include "rockchip_vpu2_regs.h"
#include "rockchip_vpu981_regs.h"
#define RK3066_ACLK_MAX_FREQ (300 * 1000 * 1000)
#define RK3288_ACLK_MAX_FREQ (400 * 1000 * 1000)
#define ROCKCHIP_VPU981_MIN_SIZE 64
/*
* Supported formats.
*/
static const struct hantro_fmt rockchip_vpu_enc_fmts[] = {
{
.fourcc = V4L2_PIX_FMT_YUV420M,
.codec_mode = HANTRO_MODE_NONE,
.enc_fmt = ROCKCHIP_VPU_ENC_FMT_YUV420P,
},
{
.fourcc = V4L2_PIX_FMT_NV12M,
.codec_mode = HANTRO_MODE_NONE,
.enc_fmt = ROCKCHIP_VPU_ENC_FMT_YUV420SP,
},
{
.fourcc = V4L2_PIX_FMT_YUYV,
.codec_mode = HANTRO_MODE_NONE,
.enc_fmt = ROCKCHIP_VPU_ENC_FMT_YUYV422,
},
{
.fourcc = V4L2_PIX_FMT_UYVY,
.codec_mode = HANTRO_MODE_NONE,
.enc_fmt = ROCKCHIP_VPU_ENC_FMT_UYVY422,
},
{
.fourcc = V4L2_PIX_FMT_JPEG,
.codec_mode = HANTRO_MODE_JPEG_ENC,
.max_depth = 2,
.header_size = JPEG_HEADER_SIZE,
.frmsize = {
.min_width = 96,
.max_width = 8192,
.step_width = MB_DIM,
.min_height = 32,
.max_height = 8192,
.step_height = MB_DIM,
},
},
};
static const struct hantro_fmt rockchip_vpu1_postproc_fmts[] = {
{
.fourcc = V4L2_PIX_FMT_YUYV,
.codec_mode = HANTRO_MODE_NONE,
.postprocessed = true,
.frmsize = {
.min_width = FMT_MIN_WIDTH,
.max_width = FMT_FHD_WIDTH,
.step_width = MB_DIM,
.min_height = FMT_MIN_HEIGHT,
.max_height = FMT_FHD_HEIGHT,
.step_height = MB_DIM,
},
},
};
static const struct hantro_fmt rockchip_vpu981_postproc_fmts[] = {
{
.fourcc = V4L2_PIX_FMT_NV12,
.codec_mode = HANTRO_MODE_NONE,
.postprocessed = true,
.frmsize = {
.min_width = ROCKCHIP_VPU981_MIN_SIZE,
.max_width = FMT_4K_WIDTH,
.step_width = MB_DIM,
.min_height = ROCKCHIP_VPU981_MIN_SIZE,
.max_height = FMT_4K_HEIGHT,
Annotation
- Immediate include surface: `linux/clk.h`, `hantro.h`, `hantro_jpeg.h`, `hantro_g1_regs.h`, `hantro_h1_regs.h`, `rockchip_vpu2_regs.h`, `rockchip_vpu981_regs.h`.
- Detected declarations: `function rockchip_vpu1_vepu_irq`, `function rockchip_vpu2_vdpu_irq`, `function rockchip_vpu2_vepu_irq`, `function rk3588_vpu981_irq`, `function rk3036_vpu_hw_init`, `function rk3066_vpu_hw_init`, `function rockchip_vpu_hw_init`, `function rk3066_vpu_dec_reset`, `function rockchip_vpu1_enc_reset`, `function rockchip_vpu2_dec_reset`.
- Atlas domain: Driver Families / drivers/media.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.