drivers/media/platform/verisilicon/rockchip_vpu981_regs.h
Source file repositories/reference/linux-study-clean/drivers/media/platform/verisilicon/rockchip_vpu981_regs.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/media/platform/verisilicon/rockchip_vpu981_regs.h- Extension
.h- Size
- 20673 bytes
- Lines
- 478
- Domain
- Driver Families
- Bucket
- drivers/media
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
hantro.h
Detected Declarations
function Copyright
Annotated Snippet
#ifndef _ROCKCHIP_VPU981_REGS_H_
#define _ROCKCHIP_VPU981_REGS_H_
#include "hantro.h"
#define AV1_SWREG(nr) ((nr) * 4)
#define AV1_DEC_REG(b, s, m) \
((const struct hantro_reg) { \
.base = AV1_SWREG(b), \
.shift = s, \
.mask = m, \
})
#define AV1_REG_INTERRUPT AV1_SWREG(1)
#define AV1_REG_INTERRUPT_DEC_RDY_INT BIT(12)
#define AV1_REG_CONFIG AV1_SWREG(2)
#define AV1_REG_CONFIG_DEC_CLK_GATE_E BIT(10)
#define av1_dec_e AV1_DEC_REG(1, 0, 0x1)
#define av1_dec_abort_e AV1_DEC_REG(1, 5, 0x1)
#define av1_dec_tile_int_e AV1_DEC_REG(1, 7, 0x1)
#define av1_dec_clk_gate_e AV1_DEC_REG(2, 10, 0x1)
#define av1_dec_out_ec_bypass AV1_DEC_REG(3, 8, 0x1)
#define av1_write_mvs_e AV1_DEC_REG(3, 12, 0x1)
#define av1_filtering_dis AV1_DEC_REG(3, 14, 0x1)
#define av1_dec_out_dis AV1_DEC_REG(3, 15, 0x1)
#define av1_dec_out_ec_byte_word AV1_DEC_REG(3, 16, 0x1)
#define av1_skip_mode AV1_DEC_REG(3, 26, 0x1)
#define av1_dec_mode AV1_DEC_REG(3, 27, 0x1f)
#define av1_ref_frames AV1_DEC_REG(4, 0, 0xf)
#define av1_pic_height_in_cbs AV1_DEC_REG(4, 6, 0x1fff)
#define av1_pic_width_in_cbs AV1_DEC_REG(4, 19, 0x1fff)
#define av1_ref_scaling_enable AV1_DEC_REG(5, 0, 0x1)
#define av1_filt_level_base_gt32 AV1_DEC_REG(5, 1, 0x1)
#define av1_error_resilient AV1_DEC_REG(5, 2, 0x1)
#define av1_force_interger_mv AV1_DEC_REG(5, 3, 0x1)
#define av1_allow_intrabc AV1_DEC_REG(5, 4, 0x1)
#define av1_allow_screen_content_tools AV1_DEC_REG(5, 5, 0x1)
#define av1_reduced_tx_set_used AV1_DEC_REG(5, 6, 0x1)
#define av1_enable_dual_filter AV1_DEC_REG(5, 7, 0x1)
#define av1_enable_jnt_comp AV1_DEC_REG(5, 8, 0x1)
#define av1_allow_filter_intra AV1_DEC_REG(5, 9, 0x1)
#define av1_enable_intra_edge_filter AV1_DEC_REG(5, 10, 0x1)
#define av1_tempor_mvp_e AV1_DEC_REG(5, 11, 0x1)
#define av1_allow_interintra AV1_DEC_REG(5, 12, 0x1)
#define av1_allow_masked_compound AV1_DEC_REG(5, 13, 0x1)
#define av1_enable_cdef AV1_DEC_REG(5, 14, 0x1)
#define av1_switchable_motion_mode AV1_DEC_REG(5, 15, 0x1)
#define av1_show_frame AV1_DEC_REG(5, 16, 0x1)
#define av1_superres_is_scaled AV1_DEC_REG(5, 17, 0x1)
#define av1_allow_warp AV1_DEC_REG(5, 18, 0x1)
#define av1_disable_cdf_update AV1_DEC_REG(5, 19, 0x1)
#define av1_preskip_segid AV1_DEC_REG(5, 20, 0x1)
#define av1_delta_lf_present AV1_DEC_REG(5, 21, 0x1)
#define av1_delta_lf_multi AV1_DEC_REG(5, 22, 0x1)
#define av1_delta_lf_res_log AV1_DEC_REG(5, 23, 0x3)
#define av1_strm_start_bit AV1_DEC_REG(5, 25, 0x7f)
#define av1_stream_len AV1_DEC_REG(6, 0, 0xffffffff)
#define av1_delta_q_present AV1_DEC_REG(7, 0, 0x1)
#define av1_delta_q_res_log AV1_DEC_REG(7, 1, 0x3)
#define av1_cdef_damping AV1_DEC_REG(7, 3, 0x3)
#define av1_cdef_bits AV1_DEC_REG(7, 5, 0x3)
#define av1_apply_grain AV1_DEC_REG(7, 7, 0x1)
#define av1_num_y_points_b AV1_DEC_REG(7, 8, 0x1)
#define av1_num_cb_points_b AV1_DEC_REG(7, 9, 0x1)
#define av1_num_cr_points_b AV1_DEC_REG(7, 10, 0x1)
#define av1_overlap_flag AV1_DEC_REG(7, 11, 0x1)
#define av1_clip_to_restricted_range AV1_DEC_REG(7, 12, 0x1)
#define av1_chroma_scaling_from_luma AV1_DEC_REG(7, 13, 0x1)
#define av1_random_seed AV1_DEC_REG(7, 14, 0xffff)
#define av1_blackwhite_e AV1_DEC_REG(7, 30, 0x1)
#define av1_scaling_shift AV1_DEC_REG(8, 0, 0xf)
#define av1_bit_depth_c_minus8 AV1_DEC_REG(8, 4, 0x3)
#define av1_bit_depth_y_minus8 AV1_DEC_REG(8, 6, 0x3)
#define av1_quant_base_qindex AV1_DEC_REG(8, 8, 0xff)
#define av1_idr_pic_e AV1_DEC_REG(8, 16, 0x1)
#define av1_superres_pic_width AV1_DEC_REG(8, 17, 0x7fff)
#define av1_ref4_sign_bias AV1_DEC_REG(9, 2, 0x1)
#define av1_ref5_sign_bias AV1_DEC_REG(9, 3, 0x1)
#define av1_ref6_sign_bias AV1_DEC_REG(9, 4, 0x1)
Annotation
- Immediate include surface: `hantro.h`.
- Detected declarations: `function Copyright`.
- Atlas domain: Driver Families / drivers/media.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.