drivers/media/platform/xilinx/xilinx-dma.h
Source file repositories/reference/linux-study-clean/drivers/media/platform/xilinx/xilinx-dma.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/media/platform/xilinx/xilinx-dma.h- Extension
.h- Size
- 3055 bytes
- Lines
- 110
- Domain
- Driver Families
- Bucket
- drivers/media
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/dmaengine.hlinux/mutex.hlinux/spinlock.hlinux/videodev2.hmedia/media-entity.hmedia/v4l2-dev.hmedia/videobuf2-v4l2.h
Detected Declarations
struct dma_chanstruct xvip_composite_devicestruct xvip_video_formatstruct xvip_pipelinestruct xvip_dma
Annotated Snippet
struct xvip_pipeline {
struct media_pipeline pipe;
struct mutex lock;
unsigned int use_count;
unsigned int stream_count;
unsigned int num_dmas;
struct xvip_dma *output;
};
static inline struct xvip_pipeline *to_xvip_pipeline(struct video_device *vdev)
{
struct media_pipeline *pipe = video_device_pipeline(vdev);
if (!pipe)
return NULL;
return container_of(pipe, struct xvip_pipeline, pipe);
}
/**
* struct xvip_dma - Video DMA channel
* @list: list entry in a composite device dmas list
* @video: V4L2 video device associated with the DMA channel
* @pad: media pad for the video device entity
* @xdev: composite device the DMA channel belongs to
* @pipe: pipeline belonging to the DMA channel
* @port: composite device DT node port number for the DMA channel
* @lock: protects the @format, @fmtinfo and @queue fields
* @format: active V4L2 pixel format
* @fmtinfo: format information corresponding to the active @format
* @queue: vb2 buffers queue
* @sequence: V4L2 buffers sequence number
* @queued_bufs: list of queued buffers
* @queued_lock: protects the buf_queued list
* @dma: DMA engine channel
* @align: transfer alignment required by the DMA channel (in bytes)
* @xt: dma interleaved template for dma configuration
* @sgl: data chunk structure for dma_interleaved_template
*/
struct xvip_dma {
struct list_head list;
struct video_device video;
struct media_pad pad;
struct xvip_composite_device *xdev;
struct xvip_pipeline pipe;
unsigned int port;
struct mutex lock;
struct v4l2_pix_format format;
const struct xvip_video_format *fmtinfo;
struct vb2_queue queue;
unsigned int sequence;
struct list_head queued_bufs;
spinlock_t queued_lock;
struct dma_chan *dma;
unsigned int align;
struct dma_interleaved_template xt;
struct data_chunk sgl;
};
#define to_xvip_dma(vdev) container_of(vdev, struct xvip_dma, video)
int xvip_dma_init(struct xvip_composite_device *xdev, struct xvip_dma *dma,
enum v4l2_buf_type type, unsigned int port);
void xvip_dma_cleanup(struct xvip_dma *dma);
#endif /* __XILINX_VIP_DMA_H__ */
Annotation
- Immediate include surface: `linux/dmaengine.h`, `linux/mutex.h`, `linux/spinlock.h`, `linux/videodev2.h`, `media/media-entity.h`, `media/v4l2-dev.h`, `media/videobuf2-v4l2.h`.
- Detected declarations: `struct dma_chan`, `struct xvip_composite_device`, `struct xvip_video_format`, `struct xvip_pipeline`, `struct xvip_dma`.
- Atlas domain: Driver Families / drivers/media.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.