drivers/media/spi/gs1662.c

Source file repositories/reference/linux-study-clean/drivers/media/spi/gs1662.c

File Facts

System
Linux kernel
Corpus path
drivers/media/spi/gs1662.c
Extension
.c
Size
11116 bytes
Lines
484
Domain
Driver Families
Bucket
drivers/media
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct gs {
	struct spi_device *pdev;
	struct v4l2_subdev sd;
	struct v4l2_dv_timings current_timings;
	int enabled;
};

struct gs_reg_fmt {
	u16 reg_value;
	struct v4l2_dv_timings format;
};

static const struct spi_device_id gs_id[] = {
	{ "gs1662", 0 },
	{ }
};
MODULE_DEVICE_TABLE(spi, gs_id);

static const struct v4l2_dv_timings fmt_cap[] = {
	V4L2_DV_BT_SDI_720X487I60,
	V4L2_DV_BT_CEA_720X576P50,
	V4L2_DV_BT_CEA_1280X720P24,
	V4L2_DV_BT_CEA_1280X720P25,
	V4L2_DV_BT_CEA_1280X720P30,
	V4L2_DV_BT_CEA_1280X720P50,
	V4L2_DV_BT_CEA_1280X720P60,
	V4L2_DV_BT_CEA_1920X1080P24,
	V4L2_DV_BT_CEA_1920X1080P25,
	V4L2_DV_BT_CEA_1920X1080P30,
	V4L2_DV_BT_CEA_1920X1080I50,
	V4L2_DV_BT_CEA_1920X1080I60,
};

static const struct gs_reg_fmt reg_fmt[] = {
	{ 0x00, V4L2_DV_BT_CEA_1280X720P60 },
	{ 0x01, V4L2_DV_BT_CEA_1280X720P60 },
	{ 0x02, V4L2_DV_BT_CEA_1280X720P30 },
	{ 0x03, V4L2_DV_BT_CEA_1280X720P30 },
	{ 0x04, V4L2_DV_BT_CEA_1280X720P50 },
	{ 0x05, V4L2_DV_BT_CEA_1280X720P50 },
	{ 0x06, V4L2_DV_BT_CEA_1280X720P25 },
	{ 0x07, V4L2_DV_BT_CEA_1280X720P25 },
	{ 0x08, V4L2_DV_BT_CEA_1280X720P24 },
	{ 0x09, V4L2_DV_BT_CEA_1280X720P24 },
	{ 0x0A, V4L2_DV_BT_CEA_1920X1080I60 },
	{ 0x0B, V4L2_DV_BT_CEA_1920X1080P30 },

	/* Default value: keep this field before 0xC */
	{ 0x14, V4L2_DV_BT_CEA_1920X1080I50 },
	{ 0x0C, V4L2_DV_BT_CEA_1920X1080I50 },
	{ 0x0D, V4L2_DV_BT_CEA_1920X1080P25 },
	{ 0x0E, V4L2_DV_BT_CEA_1920X1080P25 },
	{ 0x10, V4L2_DV_BT_CEA_1920X1080P24 },
	{ 0x12, V4L2_DV_BT_CEA_1920X1080P24 },
	{ 0x16, V4L2_DV_BT_SDI_720X487I60 },
	{ 0x19, V4L2_DV_BT_SDI_720X487I60 },
	{ 0x18, V4L2_DV_BT_CEA_720X576P50 },
	{ 0x1A, V4L2_DV_BT_CEA_720X576P50 },

	/* Implement following timings before enable it.
	 * Because of we don't have access to these theoretical timings yet.
	 * Workaround: use functions to get and set registers for these formats.
	 */
#if 0
	{ 0x0F, V4L2_DV_BT_XXX_1920X1080I25 }, /* SMPTE 274M */
	{ 0x11, V4L2_DV_BT_XXX_1920X1080I24 }, /* SMPTE 274M */
	{ 0x13, V4L2_DV_BT_XXX_1920X1080I25 }, /* SMPTE 274M */
	{ 0x15, V4L2_DV_BT_XXX_1920X1035I60 }, /* SMPTE 260M */
	{ 0x17, V4L2_DV_BT_SDI_720X507I60 }, /* SMPTE 125M */
	{ 0x1B, V4L2_DV_BT_SDI_720X507I60 }, /* SMPTE 125M */
	{ 0x1C, V4L2_DV_BT_XXX_2048X1080P25 }, /* SMPTE 428.1M */
#endif
};

static const struct v4l2_dv_timings_cap gs_timings_cap = {
	.type = V4L2_DV_BT_656_1120,
	/* keep this initialization for compatibility with GCC < 4.4.6 */
	.reserved = { 0 },
	V4L2_INIT_BT_TIMINGS(GS_WIDTH_MIN, GS_WIDTH_MAX, GS_HEIGHT_MIN,
			     GS_HEIGHT_MAX, GS_PIXELCLOCK_MIN,
			     GS_PIXELCLOCK_MAX,
			     V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_SDI,
			     V4L2_DV_BT_CAP_PROGRESSIVE
			     | V4L2_DV_BT_CAP_INTERLACED)
};

static int gs_read_register(struct spi_device *spi, u16 addr, u16 *value)
{
	int ret;
	u16 buf_addr = (0x8000 | (0x0FFF & addr));

Annotation

Implementation Notes