drivers/media/usb/em28xx/em28xx-reg.h

Source file repositories/reference/linux-study-clean/drivers/media/usb/em28xx/em28xx-reg.h

File Facts

System
Linux kernel
Corpus path
drivers/media/usb/em28xx/em28xx-reg.h
Extension
.h
Size
9793 bytes
Lines
303
Domain
Driver Families
Bucket
drivers/media
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#define EM_GPIO_0  ((unsigned char)BIT(0))
#define EM_GPIO_1  ((unsigned char)BIT(1))
#define EM_GPIO_2  ((unsigned char)BIT(2))
#define EM_GPIO_3  ((unsigned char)BIT(3))
#define EM_GPIO_4  ((unsigned char)BIT(4))
#define EM_GPIO_5  ((unsigned char)BIT(5))
#define EM_GPIO_6  ((unsigned char)BIT(6))
#define EM_GPIO_7  ((unsigned char)BIT(7))

#define EM_GPO_0   ((unsigned char)BIT(0))
#define EM_GPO_1   ((unsigned char)BIT(1))
#define EM_GPO_2   ((unsigned char)BIT(2))
#define EM_GPO_3   ((unsigned char)BIT(3))

/* em28xx endpoints */
/* 0x82:   (always ?) analog */
#define EM28XX_EP_AUDIO		0x83
/* 0x84:   digital or analog */

/* em2800 registers */
#define EM2800_R08_AUDIOSRC 0x08

/* em28xx registers */

#define EM28XX_R00_CHIPCFG	0x00

/* em28xx Chip Configuration 0x00 */
#define EM2860_CHIPCFG_VENDOR_AUDIO		0x80
#define EM2860_CHIPCFG_I2S_VOLUME_CAPABLE	0x40
#define EM2820_CHIPCFG_I2S_3_SAMPRATES		0x30
#define EM2860_CHIPCFG_I2S_5_SAMPRATES		0x30
#define EM2820_CHIPCFG_I2S_1_SAMPRATE		0x20
#define EM2860_CHIPCFG_I2S_3_SAMPRATES		0x20
#define EM28XX_CHIPCFG_AC97			0x10
#define EM28XX_CHIPCFG_AUDIOMASK		0x30

#define EM28XX_R01_CHIPCFG2	0x01

/* em28xx Chip Configuration 2 0x01 */
#define EM28XX_CHIPCFG2_TS_PRESENT		0x10
#define EM28XX_CHIPCFG2_TS_REQ_INTERVAL_MASK	0x0c /* bits 3-2 */
#define EM28XX_CHIPCFG2_TS_REQ_INTERVAL_1MF	0x00
#define EM28XX_CHIPCFG2_TS_REQ_INTERVAL_2MF	0x04
#define EM28XX_CHIPCFG2_TS_REQ_INTERVAL_4MF	0x08
#define EM28XX_CHIPCFG2_TS_REQ_INTERVAL_8MF	0x0c
#define EM28XX_CHIPCFG2_TS_PACKETSIZE_MASK	0x03 /* bits 0-1 */
#define EM28XX_CHIPCFG2_TS_PACKETSIZE_188	0x00
#define EM28XX_CHIPCFG2_TS_PACKETSIZE_376	0x01
#define EM28XX_CHIPCFG2_TS_PACKETSIZE_564	0x02
#define EM28XX_CHIPCFG2_TS_PACKETSIZE_752	0x03

/* GPIO/GPO registers */
#define EM2880_R04_GPO		0x04    /* em2880-em2883 only */
#define EM2820_R08_GPIO_CTRL	0x08	/* em2820-em2873/83 only */
#define EM2820_R09_GPIO_STATE	0x09	/* em2820-em2873/83 only */

#define EM28XX_R06_I2C_CLK	0x06

/* em28xx I2C Clock Register (0x06) */
#define EM28XX_I2C_CLK_ACK_LAST_READ	0x80
#define EM28XX_I2C_CLK_WAIT_ENABLE	0x40
#define EM28XX_I2C_EEPROM_ON_BOARD	0x08
#define EM28XX_I2C_EEPROM_KEY_VALID	0x04
#define EM2874_I2C_SECONDARY_BUS_SELECT	0x04 /* em2874 has two i2c buses */
#define EM28XX_I2C_FREQ_1_5_MHZ		0x03 /* bus frequency (bits [1-0]) */
#define EM28XX_I2C_FREQ_25_KHZ		0x02
#define EM28XX_I2C_FREQ_400_KHZ		0x01
#define EM28XX_I2C_FREQ_100_KHZ		0x00

#define EM28XX_R0A_CHIPID	0x0a
#define EM28XX_R0C_USBSUSP	0x0c
#define   EM28XX_R0C_USBSUSP_SNAPSHOT	0x20 /* 1=button pressed, needs reset */

#define EM28XX_R0E_AUDIOSRC	0x0e
#define EM28XX_R0F_XCLK	0x0f

/* em28xx XCLK Register (0x0f) */
#define EM28XX_XCLK_AUDIO_UNMUTE	0x80 /* otherwise audio muted */
#define EM28XX_XCLK_I2S_MSB_TIMING	0x40 /* otherwise standard timing */
#define EM28XX_XCLK_IR_RC5_MODE		0x20 /* otherwise NEC mode */
#define EM28XX_XCLK_IR_NEC_CHK_PARITY	0x10
#define EM28XX_XCLK_FREQUENCY_30MHZ	0x00 /* Freq. select (bits [3-0]) */
#define EM28XX_XCLK_FREQUENCY_15MHZ	0x01
#define EM28XX_XCLK_FREQUENCY_10MHZ	0x02
#define EM28XX_XCLK_FREQUENCY_7_5MHZ	0x03
#define EM28XX_XCLK_FREQUENCY_6MHZ	0x04
#define EM28XX_XCLK_FREQUENCY_5MHZ	0x05
#define EM28XX_XCLK_FREQUENCY_4_3MHZ	0x06
#define EM28XX_XCLK_FREQUENCY_12MHZ	0x07
#define EM28XX_XCLK_FREQUENCY_20MHZ	0x08

Annotation

Implementation Notes