drivers/memory/tegra/tegra114-emc.c
Source file repositories/reference/linux-study-clean/drivers/memory/tegra/tegra114-emc.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/memory/tegra/tegra114-emc.c- Extension
.c- Size
- 35059 bytes
- Lines
- 1352
- Domain
- Driver Families
- Bucket
- drivers/memory
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/clk/tegra.hlinux/debugfs.hlinux/delay.hlinux/interrupt.hlinux/io.hlinux/iopoll.hlinux/module.hlinux/mutex.hlinux/of.hlinux/platform_device.hlinux/pm_opp.hlinux/sort.hlinux/string.hsoc/tegra/common.hsoc/tegra/fuse.hsoc/tegra/mc.hmc.htegra-emc-common.h
Detected Declarations
struct emc_timingstruct tegra_emcenum emc_dram_typeenum emc_dll_changefunction tegra114_emc_isrfunction emc_ccfifo_writelfunction emc_seq_update_timingfunction emc_seq_disable_auto_calfunction emc_seq_wait_clkchangefunction tegra114_emc_prepare_timing_changefunction tegra114_emc_complete_timing_changefunction emc_read_current_timingfunction emc_initfunction load_one_timing_from_dtfunction cmp_timingsfunction emc_check_mc_timingsfunction tegra114_emc_load_timings_from_dtfunction for_each_child_of_node_scopedfunction tegra114_emc_find_node_by_ram_codefunction for_each_child_of_nodefunction tegra114_emc_validate_ratefunction tegra114_emc_debug_available_rates_showfunction tegra114_emc_debug_min_rate_getfunction tegra114_emc_debug_min_rate_setfunction tegra114_emc_debug_max_rate_getfunction tegra114_emc_debug_max_rate_setfunction emc_debugfs_initfunction to_tegra_emc_providerfunction emc_of_icc_xlate_extendedfunction emc_icc_setfunction tegra114_emc_interconnect_initfunction devm_tegra114_emc_unset_callbackfunction tegra114_emc_probe
Annotated Snippet
struct emc_timing {
unsigned long rate;
u32 emc_burst_data[ARRAY_SIZE(emc_burst_regs)];
u32 emc_auto_cal_config;
u32 emc_auto_cal_config2;
u32 emc_auto_cal_config3;
u32 emc_auto_cal_interval;
u32 emc_cfg;
u32 emc_ctt_term_ctrl;
u32 emc_mode_1;
u32 emc_mode_2;
u32 emc_mode_4;
u32 emc_mode_reset;
u32 emc_mrs_wait_cnt;
u32 emc_sel_dpd_ctrl;
u32 emc_xm2dqspadctrl2;
u32 emc_zcal_cnt_long;
u32 emc_zcal_interval;
};
struct tegra_emc {
struct device *dev;
struct tegra_mc *mc;
void __iomem *regs;
unsigned int irq;
struct clk *clk;
enum emc_dram_type dram_type;
unsigned int dram_num;
struct emc_timing last_timing;
struct emc_timing *timings;
unsigned int num_timings;
struct {
struct dentry *root;
unsigned long min_rate;
unsigned long max_rate;
} debugfs;
struct icc_provider provider;
struct tegra_emc_rate_requests reqs;
};
static irqreturn_t tegra114_emc_isr(int irq, void *data)
{
struct tegra_emc *emc = data;
u32 intmask = EMC_INTSTATUS_REFRESH_OVERFLOW;
u32 status;
status = readl_relaxed(emc->regs + EMC_INTSTATUS) & intmask;
if (!status)
return IRQ_NONE;
/* notify about HW problem */
if (status & EMC_INTSTATUS_REFRESH_OVERFLOW)
dev_err_ratelimited(emc->dev,
"refresh request overflow timeout\n");
/* clear interrupts */
writel_relaxed(status, emc->regs + EMC_INTSTATUS);
return IRQ_HANDLED;
}
/* Timing change sequence functions */
static void emc_ccfifo_writel(struct tegra_emc *emc, u32 value,
unsigned long offset)
{
writel(value, emc->regs + EMC_CCFIFO_DATA);
writel(offset, emc->regs + EMC_CCFIFO_ADDR);
}
static void emc_seq_update_timing(struct tegra_emc *emc)
{
int ret;
u32 value;
writel(1, emc->regs + EMC_TIMING_CONTROL);
ret = readl_poll_timeout_atomic(emc->regs + EMC_STATUS, value,
!(value & EMC_STATUS_TIMING_UPDATE_STALLED),
1, EMC_STATUS_UPDATE_TIMEOUT);
if (ret)
dev_err(emc->dev, "timing update timed out\n");
}
Annotation
- Immediate include surface: `linux/clk.h`, `linux/clk/tegra.h`, `linux/debugfs.h`, `linux/delay.h`, `linux/interrupt.h`, `linux/io.h`, `linux/iopoll.h`, `linux/module.h`.
- Detected declarations: `struct emc_timing`, `struct tegra_emc`, `enum emc_dram_type`, `enum emc_dll_change`, `function tegra114_emc_isr`, `function emc_ccfifo_writel`, `function emc_seq_update_timing`, `function emc_seq_disable_auto_cal`, `function emc_seq_wait_clkchange`, `function tegra114_emc_prepare_timing_change`.
- Atlas domain: Driver Families / drivers/memory.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.