drivers/memory/tegra/tegra186-emc.c
Source file repositories/reference/linux-study-clean/drivers/memory/tegra/tegra186-emc.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/memory/tegra/tegra186-emc.c- Extension
.c- Size
- 10615 bytes
- Lines
- 421
- Domain
- Driver Families
- Bucket
- drivers/memory
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/debugfs.hlinux/module.hlinux/mod_devicetable.hlinux/of_platform.hlinux/platform_device.hsoc/tegra/bpmp.hmc.h
Detected Declarations
struct tegra186_emc_dvfsstruct tegra186_emcfunction tegra186_emc_validate_ratefunction tegra186_emc_debug_available_rates_showfunction tegra186_emc_debug_min_rate_getfunction tegra186_emc_debug_min_rate_setfunction tegra186_emc_debug_max_rate_getfunction tegra186_emc_debug_max_rate_setfunction tegra186_emc_get_emc_dvfs_latencyfunction tegra186_emc_icc_set_bwfunction tegra186_emc_of_icc_xlatefunction tegra186_emc_icc_get_init_bwfunction tegra186_emc_interconnect_initfunction tegra186_emc_probefunction tegra186_emc_remove
Annotated Snippet
struct tegra186_emc_dvfs {
unsigned long latency;
unsigned long rate;
};
struct tegra186_emc {
struct tegra_bpmp *bpmp;
struct device *dev;
struct clk *clk;
struct clk *clk_dbb;
struct tegra186_emc_dvfs *dvfs;
unsigned int num_dvfs;
struct {
struct dentry *root;
unsigned long min_rate;
unsigned long max_rate;
} debugfs;
struct icc_provider provider;
};
/*
* debugfs interface
*
* The memory controller driver exposes some files in debugfs that can be used
* to control the EMC frequency. The top-level directory can be found here:
*
* /sys/kernel/debug/emc
*
* It contains the following files:
*
* - available_rates: This file contains a list of valid, space-separated
* EMC frequencies.
*
* - min_rate: Writing a value to this file sets the given frequency as the
* floor of the permitted range. If this is higher than the currently
* configured EMC frequency, this will cause the frequency to be
* increased so that it stays within the valid range.
*
* - max_rate: Similarily to the min_rate file, writing a value to this file
* sets the given frequency as the ceiling of the permitted range. If
* the value is lower than the currently configured EMC frequency, this
* will cause the frequency to be decreased so that it stays within the
* valid range.
*/
static bool tegra186_emc_validate_rate(struct tegra186_emc *emc,
unsigned long rate)
{
unsigned int i;
for (i = 0; i < emc->num_dvfs; i++)
if (rate == emc->dvfs[i].rate)
return true;
return false;
}
static int tegra186_emc_debug_available_rates_show(struct seq_file *s,
void *data)
{
struct tegra186_emc *emc = s->private;
const char *prefix = "";
unsigned int i;
for (i = 0; i < emc->num_dvfs; i++) {
seq_printf(s, "%s%lu", prefix, emc->dvfs[i].rate);
prefix = " ";
}
seq_puts(s, "\n");
return 0;
}
DEFINE_SHOW_ATTRIBUTE(tegra186_emc_debug_available_rates);
static int tegra186_emc_debug_min_rate_get(void *data, u64 *rate)
{
struct tegra186_emc *emc = data;
*rate = emc->debugfs.min_rate;
return 0;
}
static int tegra186_emc_debug_min_rate_set(void *data, u64 rate)
{
struct tegra186_emc *emc = data;
Annotation
- Immediate include surface: `linux/clk.h`, `linux/debugfs.h`, `linux/module.h`, `linux/mod_devicetable.h`, `linux/of_platform.h`, `linux/platform_device.h`, `soc/tegra/bpmp.h`, `mc.h`.
- Detected declarations: `struct tegra186_emc_dvfs`, `struct tegra186_emc`, `function tegra186_emc_validate_rate`, `function tegra186_emc_debug_available_rates_show`, `function tegra186_emc_debug_min_rate_get`, `function tegra186_emc_debug_min_rate_set`, `function tegra186_emc_debug_max_rate_get`, `function tegra186_emc_debug_max_rate_set`, `function tegra186_emc_get_emc_dvfs_latency`, `function tegra186_emc_icc_set_bw`.
- Atlas domain: Driver Families / drivers/memory.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.