drivers/memory/tegra/tegra20.c
Source file repositories/reference/linux-study-clean/drivers/memory/tegra/tegra20.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/memory/tegra/tegra20.c- Extension
.c- Size
- 20041 bytes
- Lines
- 797
- Domain
- Driver Families
- Bucket
- drivers/memory
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/delay.hlinux/device.hlinux/mutex.hlinux/of.hlinux/slab.hlinux/string.hdt-bindings/memory/tegra20-mc.hmc.h
Detected Declarations
struct tegra20_mc_stat_gatherstruct tegra20_mc_statstruct tegra20_mc_client_statfunction tegra20_mc_hotreset_assertfunction tegra20_mc_hotreset_deassertfunction tegra20_mc_block_dmafunction tegra20_mc_dma_idlingfunction tegra20_mc_reset_statusfunction tegra20_mc_unblock_dmafunction tegra20_mc_icc_setfunction tegra20_mc_icc_aggreatefunction tegra20_mc_of_icc_xlate_extendedfunction list_for_each_entryfunction tegra20_mc_stat_gather_controlfunction tegra20_mc_stat_gatherfunction tegra20_mc_stat_eventsfunction tegra20_mc_collect_statsfunction tegra20_mc_printf_percentsfunction tegra20_mc_stats_showfunction tegra20_mc_probefunction tegra20_mc_handle_irqfunction for_each_set_bit
Annotated Snippet
struct tegra20_mc_stat_gather {
unsigned int pri_filter;
unsigned int pri_event;
unsigned int result;
unsigned int client;
unsigned int event;
bool client_enb;
};
struct tegra20_mc_stat {
struct tegra20_mc_stat_gather gather0;
struct tegra20_mc_stat_gather gather1;
unsigned int sample_time_usec;
const struct tegra_mc *mc;
};
struct tegra20_mc_client_stat {
unsigned int events;
unsigned int arb_high_prio;
unsigned int arb_timeout;
unsigned int arb_bandwidth;
unsigned int rd_wr_change;
unsigned int successive;
unsigned int page_miss;
unsigned int auto_precharge;
unsigned int arb_bank_aa;
unsigned int arb_bank_bb;
};
static const struct tegra_mc_client tegra20_mc_clients[] = {
{
.id = 0x00,
.name = "display0a",
}, {
.id = 0x01,
.name = "display0ab",
}, {
.id = 0x02,
.name = "display0b",
}, {
.id = 0x03,
.name = "display0bb",
}, {
.id = 0x04,
.name = "display0c",
}, {
.id = 0x05,
.name = "display0cb",
}, {
.id = 0x06,
.name = "display1b",
}, {
.id = 0x07,
.name = "display1bb",
}, {
.id = 0x08,
.name = "eppup",
}, {
.id = 0x09,
.name = "g2pr",
}, {
.id = 0x0a,
.name = "g2sr",
}, {
.id = 0x0b,
.name = "mpeunifbr",
}, {
.id = 0x0c,
.name = "viruv",
}, {
.id = 0x0d,
.name = "avpcarm7r",
}, {
.id = 0x0e,
.name = "displayhc",
}, {
.id = 0x0f,
.name = "displayhcb",
}, {
.id = 0x10,
.name = "fdcdrd",
}, {
.id = 0x11,
.name = "g2dr",
}, {
.id = 0x12,
.name = "host1xdmar",
}, {
.id = 0x13,
.name = "host1xr",
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/delay.h`, `linux/device.h`, `linux/mutex.h`, `linux/of.h`, `linux/slab.h`, `linux/string.h`, `dt-bindings/memory/tegra20-mc.h`.
- Detected declarations: `struct tegra20_mc_stat_gather`, `struct tegra20_mc_stat`, `struct tegra20_mc_client_stat`, `function tegra20_mc_hotreset_assert`, `function tegra20_mc_hotreset_deassert`, `function tegra20_mc_block_dma`, `function tegra20_mc_dma_idling`, `function tegra20_mc_reset_status`, `function tegra20_mc_unblock_dma`, `function tegra20_mc_icc_set`.
- Atlas domain: Driver Families / drivers/memory.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.