drivers/memory/tegra/tegra210-emc-core.c
Source file repositories/reference/linux-study-clean/drivers/memory/tegra/tegra210-emc-core.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/memory/tegra/tegra210-emc-core.c- Extension
.c- Size
- 58224 bytes
- Lines
- 2064
- Domain
- Driver Families
- Bucket
- drivers/memory
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/clk.hlinux/clk/tegra.hlinux/debugfs.hlinux/delay.hlinux/kernel.hlinux/mod_devicetable.hlinux/module.hlinux/of_reserved_mem.hlinux/platform_device.hlinux/slab.hlinux/thermal.hsoc/tegra/fuse.hsoc/tegra/mc.htegra210-emc.htegra210-mc.h
Detected Declarations
function tegra210_emc_trainfunction tegra210_emc_training_startfunction tegra210_emc_training_stopfunction tegra210_emc_get_temperaturefunction tegra210_emc_poll_refreshfunction tegra210_emc_poll_refresh_stopfunction tegra210_emc_poll_refresh_startfunction tegra210_emc_cd_max_statefunction tegra210_emc_cd_get_statefunction tegra210_emc_cd_set_statefunction tegra210_emc_set_clockfunction tegra210_change_dll_srcfunction tegra210_emc_set_refreshfunction tegra210_emc_mrr_readfunction tegra210_emc_do_clock_changefunction tegra210_emc_wait_for_updatefunction tegra210_emc_set_shadow_bypassfunction tegra210_emc_get_dll_statefunction tegra210_emc_timing_updatefunction tegra210_emc_actual_osc_clocksfunction tegra210_emc_start_periodic_compensationfunction tegra210_emc_compensatefunction tegra210_emc_dll_prelockfunction tegra210_emc_dvfs_power_ramp_upfunction tegra210_emc_dvfs_power_ramp_downfunction tegra210_emc_reset_dram_clktree_valuesfunction update_dll_controlfunction tegra210_emc_dll_disablefunction tegra210_emc_dll_enablefunction tegra210_emc_adjust_timingfunction tegra210_emc_set_ratefunction tegra210_emc_validate_ratefunction tegra210_emc_debug_available_rates_showfunction tegra210_emc_debug_min_rate_getfunction tegra210_emc_debug_min_rate_setfunction tegra210_emc_debug_max_rate_getfunction tegra210_emc_debug_max_rate_setfunction tegra210_emc_debug_temperature_getfunction tegra210_emc_debug_temperature_setfunction tegra210_emc_debugfs_initfunction tegra210_emc_detectfunction tegra210_emc_validate_timingsfunction tegra210_emc_probefunction tegra210_emc_removefunction tegra210_emc_suspendfunction tegra210_emc_resume
Annotated Snippet
if (offset == EMC_DATA_BRLSHFT_0) {
for (i = 0; i < 8; i++)
new[i] = new[i] / 64;
} else {
for (i = 0; i < 8; i++)
new[i] = new[i] % 64;
}
break;
case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0:
case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1:
case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2:
case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3:
case EMC_DATA_BRLSHFT_1:
delta[0] = 128 * (next->current_dram_clktree[C0D1U0] -
next->trained_dram_clktree[C0D1U0]);
delta[1] = 128 * (next->current_dram_clktree[C0D1U1] -
next->trained_dram_clktree[C0D1U1]);
delta[2] = 128 * (next->current_dram_clktree[C1D1U0] -
next->trained_dram_clktree[C1D1U0]);
delta[3] = 128 * (next->current_dram_clktree[C1D1U1] -
next->trained_dram_clktree[C1D1U1]);
delta_taps[0] = (delta[0] * (s32)rate) / 1000000;
delta_taps[1] = (delta[1] * (s32)rate) / 1000000;
delta_taps[2] = (delta[2] * (s32)rate) / 1000000;
delta_taps[3] = (delta[3] * (s32)rate) / 1000000;
for (i = 0; i < 4; i++) {
if ((delta_taps[i] > next->tree_margin) ||
(delta_taps[i] < (-1 * next->tree_margin))) {
new[8 + i * 2] = new[8 + i * 2] +
delta_taps[i];
new[8 + i * 2 + 1] = new[8 + i * 2 + 1] +
delta_taps[i];
}
}
if (offset == EMC_DATA_BRLSHFT_1) {
for (i = 0; i < 8; i++)
new[i + 8] = new[i + 8] / 64;
} else {
for (i = 0; i < 8; i++)
new[i + 8] = new[i + 8] % 64;
}
break;
}
switch (offset) {
case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0:
temp = CALC_TEMP(0, 0, 0, 1, 0);
break;
case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1:
temp = CALC_TEMP(0, 1, 2, 3, 2);
break;
case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2:
temp = CALC_TEMP(0, 2, 4, 5, 4);
break;
case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3:
temp = CALC_TEMP(0, 3, 6, 7, 6);
break;
case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0:
temp = CALC_TEMP(1, 0, 0, 1, 8);
break;
case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1:
temp = CALC_TEMP(1, 1, 2, 3, 10);
break;
case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2:
temp = CALC_TEMP(1, 2, 4, 5, 12);
break;
case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3:
temp = CALC_TEMP(1, 3, 6, 7, 14);
break;
case EMC_DATA_BRLSHFT_0:
temp = ((new[0] <<
EMC_DATA_BRLSHFT_0_RANK0_BYTE0_DATA_BRLSHFT_SHIFT) &
EMC_DATA_BRLSHFT_0_RANK0_BYTE0_DATA_BRLSHFT_MASK) |
((new[1] <<
EMC_DATA_BRLSHFT_0_RANK0_BYTE1_DATA_BRLSHFT_SHIFT) &
EMC_DATA_BRLSHFT_0_RANK0_BYTE1_DATA_BRLSHFT_MASK) |
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/clk.h`, `linux/clk/tegra.h`, `linux/debugfs.h`, `linux/delay.h`, `linux/kernel.h`, `linux/mod_devicetable.h`, `linux/module.h`.
- Detected declarations: `function tegra210_emc_train`, `function tegra210_emc_training_start`, `function tegra210_emc_training_stop`, `function tegra210_emc_get_temperature`, `function tegra210_emc_poll_refresh`, `function tegra210_emc_poll_refresh_stop`, `function tegra210_emc_poll_refresh_start`, `function tegra210_emc_cd_max_state`, `function tegra210_emc_cd_get_state`, `function tegra210_emc_cd_set_state`.
- Atlas domain: Driver Families / drivers/memory.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.