drivers/memory/tegra/tegra30-emc.c
Source file repositories/reference/linux-study-clean/drivers/memory/tegra/tegra30-emc.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/memory/tegra/tegra30-emc.c- Extension
.c- Size
- 41952 bytes
- Lines
- 1645
- Domain
- Driver Families
- Bucket
- drivers/memory
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/clk.hlinux/clk/tegra.hlinux/debugfs.hlinux/delay.hlinux/err.hlinux/interconnect-provider.hlinux/interrupt.hlinux/io.hlinux/iopoll.hlinux/kernel.hlinux/module.hlinux/mutex.hlinux/of.hlinux/platform_device.hlinux/pm_opp.hlinux/slab.hlinux/sort.hlinux/types.hsoc/tegra/common.hsoc/tegra/fuse.h../jedec_ddr.h../of_memory.hmc.htegra-emc-common.h
Detected Declarations
struct emc_timingstruct tegra_emcenum emc_dram_typeenum emc_dll_changefunction emc_seq_update_timingfunction tegra30_emc_isrfunction emc_dqs_presetfunction emc_prepare_mc_clk_cfgfunction emc_prepare_timing_changefunction emc_complete_timing_changefunction emc_unprepare_timing_changefunction emc_clk_change_notifyfunction load_one_timing_from_dtfunction cmp_timingsfunction emc_check_mc_timingsfunction emc_load_timings_from_dtfunction for_each_child_of_node_scopedfunction for_each_child_of_nodefunction emc_read_lpddr_mode_registerfunction emc_read_lpddr_sdram_infofunction emc_setup_hwfunction emc_round_ratefunction tegra30_emc_validate_ratefunction tegra30_emc_debug_available_rates_showfunction tegra30_emc_debug_min_rate_getfunction tegra30_emc_debug_min_rate_setfunction tegra30_emc_debug_max_rate_getfunction tegra30_emc_debug_max_rate_setfunction tegra30_emc_debugfs_initfunction to_tegra_emc_providerfunction emc_of_icc_xlate_extendedfunction emc_icc_setfunction tegra30_emc_interconnect_initfunction devm_tegra30_emc_unset_callbackfunction devm_tegra30_emc_unreg_clk_notifierfunction tegra30_emc_init_clkfunction tegra30_emc_probefunction tegra30_emc_suspendfunction tegra30_emc_resume
Annotated Snippet
struct emc_timing {
unsigned long rate;
u32 data[ARRAY_SIZE(emc_timing_registers)];
u32 emc_auto_cal_interval;
u32 emc_mode_1;
u32 emc_mode_2;
u32 emc_mode_reset;
u32 emc_zcal_cnt_long;
bool emc_cfg_periodic_qrst;
bool emc_cfg_dyn_self_ref;
};
struct tegra_emc {
struct device *dev;
struct tegra_mc *mc;
struct icc_provider provider;
struct notifier_block clk_nb;
struct clk *clk;
void __iomem *regs;
unsigned int irq;
bool bad_state;
struct emc_timing *new_timing;
struct emc_timing *timings;
unsigned int num_timings;
u32 mc_override;
u32 emc_cfg;
u32 emc_mode_1;
u32 emc_mode_2;
u32 emc_mode_reset;
bool vref_cal_toggle : 1;
bool zcal_long : 1;
bool dll_on : 1;
struct {
struct dentry *root;
unsigned long min_rate;
unsigned long max_rate;
} debugfs;
struct tegra_emc_rate_requests reqs;
bool mrr_error;
};
static int emc_seq_update_timing(struct tegra_emc *emc)
{
u32 val;
int err;
writel_relaxed(EMC_TIMING_UPDATE, emc->regs + EMC_TIMING_CONTROL);
err = readl_relaxed_poll_timeout_atomic(emc->regs + EMC_STATUS, val,
!(val & EMC_STATUS_TIMING_UPDATE_STALLED),
1, 200);
if (err) {
dev_err(emc->dev, "failed to update timing: %d\n", err);
return err;
}
return 0;
}
static irqreturn_t tegra30_emc_isr(int irq, void *data)
{
struct tegra_emc *emc = data;
u32 intmask = EMC_REFRESH_OVERFLOW_INT;
u32 status;
status = readl_relaxed(emc->regs + EMC_INTSTATUS) & intmask;
if (!status)
return IRQ_NONE;
/* notify about HW problem */
if (status & EMC_REFRESH_OVERFLOW_INT)
dev_err_ratelimited(emc->dev,
"refresh request overflow timeout\n");
/* clear interrupts */
writel_relaxed(status, emc->regs + EMC_INTSTATUS);
return IRQ_HANDLED;
}
static struct emc_timing *emc_find_timing(struct tegra_emc *emc,
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/clk.h`, `linux/clk/tegra.h`, `linux/debugfs.h`, `linux/delay.h`, `linux/err.h`, `linux/interconnect-provider.h`, `linux/interrupt.h`.
- Detected declarations: `struct emc_timing`, `struct tegra_emc`, `enum emc_dram_type`, `enum emc_dll_change`, `function emc_seq_update_timing`, `function tegra30_emc_isr`, `function emc_dqs_preset`, `function emc_prepare_mc_clk_cfg`, `function emc_prepare_timing_change`, `function emc_complete_timing_change`.
- Atlas domain: Driver Families / drivers/memory.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.