drivers/mfd/db8500-prcmu-regs.h

Source file repositories/reference/linux-study-clean/drivers/mfd/db8500-prcmu-regs.h

File Facts

System
Linux kernel
Corpus path
drivers/mfd/db8500-prcmu-regs.h
Extension
.h
Size
8180 bytes
Lines
227
Domain
Driver Families
Bucket
drivers/mfd
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __DB8500_PRCMU_REGS_H
#define __DB8500_PRCMU_REGS_H

#define BITS(_start, _end) ((BIT(_end) - BIT(_start)) + BIT(_end))

#define PRCM_ACLK_MGT		(0x004)
#define PRCM_SVAMMCSPCLK_MGT	(0x008)
#define PRCM_SIAMMDSPCLK_MGT	(0x00C)
#define PRCM_SGACLK_MGT		(0x014)
#define PRCM_UARTCLK_MGT	(0x018)
#define PRCM_MSP02CLK_MGT	(0x01C)
#define PRCM_I2CCLK_MGT		(0x020)
#define PRCM_SDMMCCLK_MGT	(0x024)
#define PRCM_SLIMCLK_MGT	(0x028)
#define PRCM_PER1CLK_MGT	(0x02C)
#define PRCM_PER2CLK_MGT	(0x030)
#define PRCM_PER3CLK_MGT	(0x034)
#define PRCM_PER5CLK_MGT	(0x038)
#define PRCM_PER6CLK_MGT	(0x03C)
#define PRCM_PER7CLK_MGT	(0x040)
#define PRCM_LCDCLK_MGT		(0x044)
#define PRCM_BMLCLK_MGT		(0x04C)
#define PRCM_HSITXCLK_MGT	(0x050)
#define PRCM_HSIRXCLK_MGT	(0x054)
#define PRCM_HDMICLK_MGT	(0x058)
#define PRCM_APEATCLK_MGT	(0x05C)
#define PRCM_APETRACECLK_MGT	(0x060)
#define PRCM_MCDECLK_MGT	(0x064)
#define PRCM_IPI2CCLK_MGT	(0x068)
#define PRCM_DSIALTCLK_MGT	(0x06C)
#define PRCM_DMACLK_MGT		(0x074)
#define PRCM_B2R2CLK_MGT	(0x078)
#define PRCM_TVCLK_MGT		(0x07C)
#define PRCM_UNIPROCLK_MGT	(0x278)
#define PRCM_SSPCLK_MGT		(0x280)
#define PRCM_RNGCLK_MGT		(0x284)
#define PRCM_UICCCLK_MGT	(0x27C)
#define PRCM_MSP1CLK_MGT	(0x288)

#define PRCM_ARM_PLLDIVPS	(prcmu_base + 0x118)
#define PRCM_ARM_PLLDIVPS_ARM_BRM_RATE		0x3f
#define PRCM_ARM_PLLDIVPS_MAX_MASK		0xf

#define PRCM_PLLARM_LOCKP       (prcmu_base + 0x0a8)
#define PRCM_PLLARM_LOCKP_PRCM_PLLARM_LOCKP3	0x2

#define PRCM_ARM_CHGCLKREQ	(prcmu_base + 0x114)
#define PRCM_ARM_CHGCLKREQ_PRCM_ARM_CHGCLKREQ	BIT(0)
#define PRCM_ARM_CHGCLKREQ_PRCM_ARM_DIVSEL	BIT(16)

#define PRCM_PLLARM_ENABLE	(prcmu_base + 0x98)
#define PRCM_PLLARM_ENABLE_PRCM_PLLARM_ENABLE	0x1
#define PRCM_PLLARM_ENABLE_PRCM_PLLARM_COUNTON	0x100

#define PRCM_ARMCLKFIX_MGT	(prcmu_base + 0x0)
#define PRCM_A9PL_FORCE_CLKEN	(prcmu_base + 0x19C)
#define PRCM_A9_RESETN_CLR	(prcmu_base + 0x1f4)
#define PRCM_A9_RESETN_SET	(prcmu_base + 0x1f0)
#define PRCM_ARM_LS_CLAMP	(prcmu_base + 0x30c)
#define PRCM_SRAM_A9		(prcmu_base + 0x308)

#define PRCM_A9PL_FORCE_CLKEN_PRCM_A9PL_FORCE_CLKEN BIT(0)
#define PRCM_A9PL_FORCE_CLKEN_PRCM_A9AXI_FORCE_CLKEN BIT(1)

/* CPU mailbox registers */
#define PRCM_MBOX_CPU_VAL	(prcmu_base + 0x0fc)
#define PRCM_MBOX_CPU_SET	(prcmu_base + 0x100)
#define PRCM_MBOX_CPU_CLR	(prcmu_base + 0x104)

#define PRCM_HOSTACCESS_REQ	(prcmu_base + 0x334)
#define PRCM_HOSTACCESS_REQ_HOSTACCESS_REQ 0x1
#define PRCM_HOSTACCESS_REQ_WAKE_REQ	BIT(16)
#define ARM_WAKEUP_MODEM	0x1

#define PRCM_ARM_IT1_CLR	(prcmu_base + 0x48C)
#define PRCM_ARM_IT1_VAL	(prcmu_base + 0x494)
#define PRCM_HOLD_EVT		(prcmu_base + 0x174)

#define PRCM_MOD_AWAKE_STATUS	(prcmu_base + 0x4A0)
#define PRCM_MOD_AWAKE_STATUS_PRCM_MOD_COREPD_AWAKE	BIT(0)
#define PRCM_MOD_AWAKE_STATUS_PRCM_MOD_AAPD_AWAKE	BIT(1)
#define PRCM_MOD_AWAKE_STATUS_PRCM_MOD_VMODEM_OFF_ISO	BIT(2)

#define PRCM_ITSTATUS0		(prcmu_base + 0x148)
#define PRCM_ITSTATUS1		(prcmu_base + 0x150)
#define PRCM_ITSTATUS2		(prcmu_base + 0x158)
#define PRCM_ITSTATUS3		(prcmu_base + 0x160)
#define PRCM_ITSTATUS4		(prcmu_base + 0x168)
#define PRCM_ITSTATUS5		(prcmu_base + 0x484)
#define PRCM_ITCLEAR5		(prcmu_base + 0x488)

Annotation

Implementation Notes