drivers/mfd/intel_soc_pmic_chtwc.c
Source file repositories/reference/linux-study-clean/drivers/mfd/intel_soc_pmic_chtwc.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/mfd/intel_soc_pmic_chtwc.c- Extension
.c- Size
- 7669 bytes
- Lines
- 279
- Domain
- Driver Families
- Bucket
- drivers/mfd
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/acpi.hlinux/delay.hlinux/dmi.hlinux/err.hlinux/i2c.hlinux/interrupt.hlinux/kernel.hlinux/mfd/core.hlinux/mfd/intel_soc_pmic.hlinux/regmap.h
Detected Declarations
function cht_wc_byte_reg_readfunction cht_wc_byte_reg_writefunction cht_wc_probefunction cht_wc_shutdownfunction cht_wc_suspendfunction cht_wc_resume
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* MFD core driver for Intel Cherrytrail Whiskey Cove PMIC
*
* Copyright (C) 2017 Hans de Goede <hdegoede@redhat.com>
*
* Based on various non upstream patches to support the CHT Whiskey Cove PMIC:
* Copyright (C) 2013-2015 Intel Corporation. All rights reserved.
*/
#include <linux/acpi.h>
#include <linux/delay.h>
#include <linux/dmi.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/mfd/core.h>
#include <linux/mfd/intel_soc_pmic.h>
#include <linux/regmap.h>
/* PMIC device registers */
#define REG_OFFSET_MASK GENMASK(7, 0)
#define REG_ADDR_MASK GENMASK(15, 8)
#define REG_ADDR_SHIFT 8
#define CHT_WC_IRQLVL1 0x6e02
#define CHT_WC_IRQLVL1_MASK 0x6e0e
/* Whiskey Cove PMIC share same ACPI ID between different platforms */
#define CHT_WC_HRV 3
/* Level 1 IRQs (level 2 IRQs are handled in the child device drivers) */
enum {
CHT_WC_PWRSRC_IRQ = 0,
CHT_WC_THRM_IRQ,
CHT_WC_BCU_IRQ,
CHT_WC_ADC_IRQ,
CHT_WC_EXT_CHGR_IRQ,
CHT_WC_GPIO_IRQ,
/* There is no irq 6 */
CHT_WC_CRIT_IRQ = 7,
};
static const struct resource cht_wc_pwrsrc_resources[] = {
DEFINE_RES_IRQ(CHT_WC_PWRSRC_IRQ),
};
static const struct resource cht_wc_ext_charger_resources[] = {
DEFINE_RES_IRQ(CHT_WC_EXT_CHGR_IRQ),
};
static struct mfd_cell cht_wc_dev[] = {
{
.name = "cht_wcove_pwrsrc",
.num_resources = ARRAY_SIZE(cht_wc_pwrsrc_resources),
.resources = cht_wc_pwrsrc_resources,
}, {
.name = "cht_wcove_ext_chgr",
.num_resources = ARRAY_SIZE(cht_wc_ext_charger_resources),
.resources = cht_wc_ext_charger_resources,
},
{ .name = "cht_wcove_region", },
{ .name = "cht_wcove_leds", },
};
/*
* The CHT Whiskey Cove covers multiple I2C addresses, with a 1 Byte
* register address space per I2C address, so we use 16 bit register
* addresses where the high 8 bits contain the I2C client address.
*/
static int cht_wc_byte_reg_read(void *context, unsigned int reg,
unsigned int *val)
{
struct i2c_client *client = context;
int ret, orig_addr = client->addr;
if (!(reg & REG_ADDR_MASK)) {
dev_err(&client->dev, "Error I2C address not specified\n");
return -EINVAL;
}
client->addr = (reg & REG_ADDR_MASK) >> REG_ADDR_SHIFT;
ret = i2c_smbus_read_byte_data(client, reg & REG_OFFSET_MASK);
client->addr = orig_addr;
if (ret < 0)
return ret;
*val = ret;
Annotation
- Immediate include surface: `linux/acpi.h`, `linux/delay.h`, `linux/dmi.h`, `linux/err.h`, `linux/i2c.h`, `linux/interrupt.h`, `linux/kernel.h`, `linux/mfd/core.h`.
- Detected declarations: `function cht_wc_byte_reg_read`, `function cht_wc_byte_reg_write`, `function cht_wc_probe`, `function cht_wc_shutdown`, `function cht_wc_suspend`, `function cht_wc_resume`.
- Atlas domain: Driver Families / drivers/mfd.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.