drivers/mfd/ocelot-core.c

Source file repositories/reference/linux-study-clean/drivers/mfd/ocelot-core.c

File Facts

System
Linux kernel
Corpus path
drivers/mfd/ocelot-core.c
Extension
.c
Size
7887 bytes
Lines
235
Domain
Driver Families
Bucket
drivers/mfd
Inferred role
Driver Families: exported/initcall integration point
Status
integration implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
 * Core driver for the Ocelot chip family.
 *
 * The VSC7511, 7512, 7513, and 7514 can be controlled internally via an
 * on-chip MIPS processor, or externally via SPI, I2C, PCIe. This core driver is
 * intended to be the bus-agnostic glue between, for example, the SPI bus and
 * the child devices.
 *
 * Copyright 2021-2022 Innovative Advantage Inc.
 *
 * Author: Colin Foster <colin.foster@in-advantage.com>
 */

#include <linux/bits.h>
#include <linux/device.h>
#include <linux/export.h>
#include <linux/iopoll.h>
#include <linux/ioport.h>
#include <linux/kernel.h>
#include <linux/mfd/core.h>
#include <linux/mfd/ocelot.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/types.h>

#include <soc/mscc/ocelot.h>

#include "ocelot.h"

#define REG_GCB_SOFT_RST		0x0008

#define BIT_SOFT_CHIP_RST		BIT(0)

#define VSC7512_MIIM0_RES_START		0x7107009c
#define VSC7512_MIIM1_RES_START		0x710700c0
#define VSC7512_MIIM_RES_SIZE		0x00000024

#define VSC7512_PHY_RES_START		0x710700f0
#define VSC7512_PHY_RES_SIZE		0x00000004

#define VSC7512_GPIO_RES_START		0x71070034
#define VSC7512_GPIO_RES_SIZE		0x0000006c

#define VSC7512_SIO_CTRL_RES_START	0x710700f8
#define VSC7512_SIO_CTRL_RES_SIZE	0x00000100

#define VSC7512_HSIO_RES_START		0x710d0000
#define VSC7512_HSIO_RES_SIZE		0x00000128

#define VSC7512_ANA_RES_START		0x71880000
#define VSC7512_ANA_RES_SIZE		0x00010000

#define VSC7512_QS_RES_START		0x71080000
#define VSC7512_QS_RES_SIZE		0x00000100

#define VSC7512_QSYS_RES_START		0x71800000
#define VSC7512_QSYS_RES_SIZE		0x00200000

#define VSC7512_REW_RES_START		0x71030000
#define VSC7512_REW_RES_SIZE		0x00010000

#define VSC7512_SYS_RES_START		0x71010000
#define VSC7512_SYS_RES_SIZE		0x00010000

#define VSC7512_S0_RES_START		0x71040000
#define VSC7512_S1_RES_START		0x71050000
#define VSC7512_S2_RES_START		0x71060000
#define VCAP_RES_SIZE			0x00000400

#define VSC7512_PORT_0_RES_START	0x711e0000
#define VSC7512_PORT_1_RES_START	0x711f0000
#define VSC7512_PORT_2_RES_START	0x71200000
#define VSC7512_PORT_3_RES_START	0x71210000
#define VSC7512_PORT_4_RES_START	0x71220000
#define VSC7512_PORT_5_RES_START	0x71230000
#define VSC7512_PORT_6_RES_START	0x71240000
#define VSC7512_PORT_7_RES_START	0x71250000
#define VSC7512_PORT_8_RES_START	0x71260000
#define VSC7512_PORT_9_RES_START	0x71270000
#define VSC7512_PORT_10_RES_START	0x71280000
#define VSC7512_PORT_RES_SIZE		0x00010000

#define VSC7512_GCB_RST_SLEEP_US	100
#define VSC7512_GCB_RST_TIMEOUT_US	100000

static int ocelot_gcb_chip_rst_status(struct ocelot_ddata *ddata)
{
	int val, err;

Annotation

Implementation Notes