drivers/mfd/pf1550.c

Source file repositories/reference/linux-study-clean/drivers/mfd/pf1550.c

File Facts

System
Linux kernel
Corpus path
drivers/mfd/pf1550.c
Extension
.c
Size
11555 bytes
Lines
368
Domain
Driver Families
Bucket
drivers/mfd
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * Core driver for the PF1550
 *
 * Copyright (C) 2016 Freescale Semiconductor, Inc.
 * Robin Gong <yibin.gong@freescale.com>
 *
 * Portions Copyright (c) 2025 Savoir-faire Linux Inc.
 * Samuel Kayode <samuel.kayode@savoirfairelinux.com>
 */

#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/mfd/core.h>
#include <linux/mfd/pf1550.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/regmap.h>

static const struct regmap_config pf1550_regmap_config = {
	.reg_bits = 8,
	.val_bits = 8,
	.max_register = PF1550_PMIC_REG_END,
};

static const struct regmap_irq pf1550_irqs[] = {
	REGMAP_IRQ_REG(PF1550_IRQ_CHG, 0, IRQ_CHG),
	REGMAP_IRQ_REG(PF1550_IRQ_REGULATOR, 0, IRQ_REGULATOR),
	REGMAP_IRQ_REG(PF1550_IRQ_ONKEY, 0, IRQ_ONKEY),
};

static const struct regmap_irq_chip pf1550_irq_chip = {
	.name = "pf1550",
	.status_base = PF1550_PMIC_REG_INT_CATEGORY,
	.init_ack_masked = 1,
	.num_regs = 1,
	.irqs = pf1550_irqs,
	.num_irqs = ARRAY_SIZE(pf1550_irqs),
};

static const struct regmap_irq pf1550_regulator_irqs[] = {
	REGMAP_IRQ_REG(PF1550_PMIC_IRQ_SW1_LS, 0, PMIC_IRQ_SW1_LS),
	REGMAP_IRQ_REG(PF1550_PMIC_IRQ_SW2_LS, 0, PMIC_IRQ_SW2_LS),
	REGMAP_IRQ_REG(PF1550_PMIC_IRQ_SW3_LS, 0, PMIC_IRQ_SW3_LS),
	REGMAP_IRQ_REG(PF1550_PMIC_IRQ_SW1_HS, 3, PMIC_IRQ_SW1_HS),
	REGMAP_IRQ_REG(PF1550_PMIC_IRQ_SW2_HS, 3, PMIC_IRQ_SW2_HS),
	REGMAP_IRQ_REG(PF1550_PMIC_IRQ_SW3_HS, 3, PMIC_IRQ_SW3_HS),
	REGMAP_IRQ_REG(PF1550_PMIC_IRQ_LDO1_FAULT, 16, PMIC_IRQ_LDO1_FAULT),
	REGMAP_IRQ_REG(PF1550_PMIC_IRQ_LDO2_FAULT, 16, PMIC_IRQ_LDO2_FAULT),
	REGMAP_IRQ_REG(PF1550_PMIC_IRQ_LDO3_FAULT, 16, PMIC_IRQ_LDO3_FAULT),
	REGMAP_IRQ_REG(PF1550_PMIC_IRQ_TEMP_110, 24, PMIC_IRQ_TEMP_110),
	REGMAP_IRQ_REG(PF1550_PMIC_IRQ_TEMP_125, 24, PMIC_IRQ_TEMP_125),
};

static const struct regmap_irq_chip pf1550_regulator_irq_chip = {
	.name = "pf1550-regulator",
	.status_base = PF1550_PMIC_REG_SW_INT_STAT0,
	.ack_base = PF1550_PMIC_REG_SW_INT_STAT0,
	.mask_base = PF1550_PMIC_REG_SW_INT_MASK0,
	.use_ack = 1,
	.init_ack_masked = 1,
	.num_regs = 25,
	.irqs = pf1550_regulator_irqs,
	.num_irqs = ARRAY_SIZE(pf1550_regulator_irqs),
};

static const struct resource regulator_resources[] = {
	DEFINE_RES_IRQ(PF1550_PMIC_IRQ_SW1_LS),
	DEFINE_RES_IRQ(PF1550_PMIC_IRQ_SW2_LS),
	DEFINE_RES_IRQ(PF1550_PMIC_IRQ_SW3_LS),
	DEFINE_RES_IRQ(PF1550_PMIC_IRQ_SW1_HS),
	DEFINE_RES_IRQ(PF1550_PMIC_IRQ_SW2_HS),
	DEFINE_RES_IRQ(PF1550_PMIC_IRQ_SW3_HS),
	DEFINE_RES_IRQ(PF1550_PMIC_IRQ_LDO1_FAULT),
	DEFINE_RES_IRQ(PF1550_PMIC_IRQ_LDO2_FAULT),
	DEFINE_RES_IRQ(PF1550_PMIC_IRQ_LDO3_FAULT),
	DEFINE_RES_IRQ(PF1550_PMIC_IRQ_TEMP_110),
	DEFINE_RES_IRQ(PF1550_PMIC_IRQ_TEMP_125),
};

static const struct regmap_irq pf1550_onkey_irqs[] = {
	REGMAP_IRQ_REG(PF1550_ONKEY_IRQ_PUSHI, 0, ONKEY_IRQ_PUSHI),
	REGMAP_IRQ_REG(PF1550_ONKEY_IRQ_1SI, 0, ONKEY_IRQ_1SI),
	REGMAP_IRQ_REG(PF1550_ONKEY_IRQ_2SI, 0, ONKEY_IRQ_2SI),
	REGMAP_IRQ_REG(PF1550_ONKEY_IRQ_3SI, 0, ONKEY_IRQ_3SI),
	REGMAP_IRQ_REG(PF1550_ONKEY_IRQ_4SI, 0, ONKEY_IRQ_4SI),
	REGMAP_IRQ_REG(PF1550_ONKEY_IRQ_8SI, 0, ONKEY_IRQ_8SI),
};

Annotation

Implementation Notes