drivers/mfd/rz-mtu3.c

Source file repositories/reference/linux-study-clean/drivers/mfd/rz-mtu3.c

File Facts

System
Linux kernel
Corpus path
drivers/mfd/rz-mtu3.c
Extension
.c
Size
10522 bytes
Lines
373
Domain
Driver Families
Bucket
drivers/mfd
Inferred role
Driver Families: exported/initcall integration point
Status
integration implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct rz_mtu3_priv {
	void __iomem *mmio;
	spinlock_t lock;
};

/******* MTU3 registers (original offset is +0x1200) *******/
static const unsigned long rz_mtu3_8bit_ch_reg_offs[][13] = {
	[RZ_MTU3_CHAN_0] = MTU_8BIT_CH_0(0x104, 0x090, 0x100, 0x128, 0x101, 0x102, 0x103, 0x126),
	[RZ_MTU3_CHAN_1] = MTU_8BIT_CH_1_2(0x184, 0x091, 0x185, 0x180, 0x194, 0x181, 0x182),
	[RZ_MTU3_CHAN_2] = MTU_8BIT_CH_1_2(0x204, 0x092, 0x205, 0x200, 0x20c, 0x201, 0x202),
	[RZ_MTU3_CHAN_3] = MTU_8BIT_CH_3_4_6_7(0x008, 0x093, 0x02c, 0x000, 0x04c, 0x002, 0x004, 0x005, 0x038),
	[RZ_MTU3_CHAN_4] = MTU_8BIT_CH_3_4_6_7(0x009, 0x094, 0x02d, 0x001, 0x04d, 0x003, 0x006, 0x007, 0x039),
	[RZ_MTU3_CHAN_5] = MTU_8BIT_CH_5(0xab2, 0x895, 0xab4, 0xab6, 0xa84, 0xa85, 0xa86, 0xa94, 0xa95, 0xa96, 0xaa4, 0xaa5, 0xaa6),
	[RZ_MTU3_CHAN_6] = MTU_8BIT_CH_3_4_6_7(0x808, 0x893, 0x82c, 0x800, 0x84c, 0x802, 0x804, 0x805, 0x838),
	[RZ_MTU3_CHAN_7] = MTU_8BIT_CH_3_4_6_7(0x809, 0x894, 0x82d, 0x801, 0x84d, 0x803, 0x806, 0x807, 0x839),
	[RZ_MTU3_CHAN_8] = MTU_8BIT_CH_8(0x404, 0x098, 0x400, 0x406, 0x401, 0x402, 0x403)
};

static const unsigned long rz_mtu3_16bit_ch_reg_offs[][12] = {
	[RZ_MTU3_CHAN_0] = MTU_16BIT_CH_0(0x106, 0x108, 0x10a, 0x10c, 0x10e, 0x120, 0x122),
	[RZ_MTU3_CHAN_1] = MTU_16BIT_CH_1_2(0x186, 0x188, 0x18a),
	[RZ_MTU3_CHAN_2] = MTU_16BIT_CH_1_2(0x206, 0x208, 0x20a),
	[RZ_MTU3_CHAN_3] = MTU_16BIT_CH_3_6(0x010, 0x018, 0x01a, 0x024, 0x026, 0x072),
	[RZ_MTU3_CHAN_4] = MTU_16BIT_CH_4_7(0x012, 0x01c, 0x01e, 0x028, 0x2a, 0x074, 0x076, 0x040, 0x044, 0x046, 0x048, 0x04a),
	[RZ_MTU3_CHAN_5] = MTU_16BIT_CH_5(0xa80, 0xa82, 0xa90, 0xa92, 0xaa0, 0xaa2),
	[RZ_MTU3_CHAN_6] = MTU_16BIT_CH_3_6(0x810, 0x818, 0x81a, 0x824, 0x826, 0x872),
	[RZ_MTU3_CHAN_7] = MTU_16BIT_CH_4_7(0x812, 0x81c, 0x81e, 0x828, 0x82a, 0x874, 0x876, 0x840, 0x844, 0x846, 0x848, 0x84a)
};

static const unsigned long rz_mtu3_32bit_ch_reg_offs[][5] = {
	[RZ_MTU3_CHAN_1] = MTU_32BIT_CH_1(0x1a0, 0x1a4, 0x1a8),
	[RZ_MTU3_CHAN_8] = MTU_32BIT_CH_8(0x408, 0x40c, 0x410, 0x414, 0x418)
};

static bool rz_mtu3_is_16bit_shared_reg(u16 offset)
{
	return (offset == RZ_MTU3_TDDRA || offset == RZ_MTU3_TDDRB ||
		offset == RZ_MTU3_TCDRA || offset == RZ_MTU3_TCDRB ||
		offset == RZ_MTU3_TCBRA || offset == RZ_MTU3_TCBRB ||
		offset == RZ_MTU3_TCNTSA || offset == RZ_MTU3_TCNTSB);
}

u16 rz_mtu3_shared_reg_read(struct rz_mtu3_channel *ch, u16 offset)
{
	struct rz_mtu3 *mtu = dev_get_drvdata(ch->dev->parent);
	struct rz_mtu3_priv *priv = mtu->priv_data;

	if (rz_mtu3_is_16bit_shared_reg(offset))
		return readw(priv->mmio + offset);
	else
		return readb(priv->mmio + offset);
}
EXPORT_SYMBOL_GPL(rz_mtu3_shared_reg_read);

u8 rz_mtu3_8bit_ch_read(struct rz_mtu3_channel *ch, u16 offset)
{
	struct rz_mtu3 *mtu = dev_get_drvdata(ch->dev->parent);
	struct rz_mtu3_priv *priv = mtu->priv_data;
	u16 ch_offs;

	ch_offs = rz_mtu3_8bit_ch_reg_offs[ch->channel_number][offset];

	return readb(priv->mmio + ch_offs);
}
EXPORT_SYMBOL_GPL(rz_mtu3_8bit_ch_read);

u16 rz_mtu3_16bit_ch_read(struct rz_mtu3_channel *ch, u16 offset)
{
	struct rz_mtu3 *mtu = dev_get_drvdata(ch->dev->parent);
	struct rz_mtu3_priv *priv = mtu->priv_data;
	u16 ch_offs;

	/* MTU8 doesn't have 16-bit registers */
	if (ch->channel_number == RZ_MTU3_CHAN_8)
		return 0;

	ch_offs = rz_mtu3_16bit_ch_reg_offs[ch->channel_number][offset];

	return readw(priv->mmio + ch_offs);
}
EXPORT_SYMBOL_GPL(rz_mtu3_16bit_ch_read);

u32 rz_mtu3_32bit_ch_read(struct rz_mtu3_channel *ch, u16 offset)
{
	struct rz_mtu3 *mtu = dev_get_drvdata(ch->dev->parent);
	struct rz_mtu3_priv *priv = mtu->priv_data;
	u16 ch_offs;

	if (ch->channel_number != RZ_MTU3_CHAN_1 && ch->channel_number != RZ_MTU3_CHAN_8)
		return 0;

Annotation

Implementation Notes