drivers/mfd/smpro-core.c
Source file repositories/reference/linux-study-clean/drivers/mfd/smpro-core.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/mfd/smpro-core.c- Extension
.c- Size
- 3461 bytes
- Lines
- 139
- Domain
- Driver Families
- Bucket
- drivers/mfd
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/i2c.hlinux/kernel.hlinux/mfd/core.hlinux/module.hlinux/of_platform.hlinux/regmap.h
Detected Declarations
function Copyrightfunction smpro_core_readfunction smpro_core_readable_noinc_regfunction smpro_core_probe
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* Ampere Altra Family SMPro core driver
* Copyright (c) 2022, Ampere Computing LLC
*/
#include <linux/i2c.h>
#include <linux/kernel.h>
#include <linux/mfd/core.h>
#include <linux/module.h>
#include <linux/of_platform.h>
#include <linux/regmap.h>
/* Identification Registers */
#define MANUFACTURER_ID_REG 0x02
#define AMPERE_MANUFACTURER_ID 0xCD3A
#define CORE_CE_ERR_DATA 0x82
#define CORE_UE_ERR_DATA 0x85
#define MEM_CE_ERR_DATA 0x92
#define MEM_UE_ERR_DATA 0x95
#define PCIE_CE_ERR_DATA 0xC2
#define PCIE_UE_ERR_DATA 0xC5
#define OTHER_CE_ERR_DATA 0xD2
#define OTHER_UE_ERR_DATA 0xDA
static int smpro_core_write(void *context, const void *data, size_t count)
{
struct device *dev = context;
struct i2c_client *i2c = to_i2c_client(dev);
int ret;
ret = i2c_master_send(i2c, data, count);
if (unlikely(ret != count))
return (ret < 0) ? ret : -EIO;
return 0;
}
static int smpro_core_read(void *context, const void *reg, size_t reg_size,
void *val, size_t val_size)
{
struct device *dev = context;
struct i2c_client *i2c = to_i2c_client(dev);
struct i2c_msg xfer[2];
unsigned char buf[2];
int ret;
xfer[0].addr = i2c->addr;
xfer[0].flags = 0;
buf[0] = *(u8 *)reg;
buf[1] = val_size;
xfer[0].len = 2;
xfer[0].buf = buf;
xfer[1].addr = i2c->addr;
xfer[1].flags = I2C_M_RD;
xfer[1].len = val_size;
xfer[1].buf = val;
ret = i2c_transfer(i2c->adapter, xfer, 2);
if (unlikely(ret != 2))
return (ret < 0) ? ret : -EIO;
return 0;
}
static const struct regmap_bus smpro_regmap_bus = {
.read = smpro_core_read,
.write = smpro_core_write,
.val_format_endian_default = REGMAP_ENDIAN_BIG,
};
static bool smpro_core_readable_noinc_reg(struct device *dev, unsigned int reg)
{
return (reg == CORE_CE_ERR_DATA || reg == CORE_UE_ERR_DATA ||
reg == MEM_CE_ERR_DATA || reg == MEM_UE_ERR_DATA ||
reg == PCIE_CE_ERR_DATA || reg == PCIE_UE_ERR_DATA ||
reg == OTHER_CE_ERR_DATA || reg == OTHER_UE_ERR_DATA);
}
static const struct regmap_config smpro_regmap_config = {
.reg_bits = 8,
.val_bits = 16,
.readable_noinc_reg = smpro_core_readable_noinc_reg,
};
static const struct mfd_cell smpro_devs[] = {
MFD_CELL_NAME("smpro-hwmon"),
Annotation
- Immediate include surface: `linux/i2c.h`, `linux/kernel.h`, `linux/mfd/core.h`, `linux/module.h`, `linux/of_platform.h`, `linux/regmap.h`.
- Detected declarations: `function Copyright`, `function smpro_core_read`, `function smpro_core_readable_noinc_reg`, `function smpro_core_probe`.
- Atlas domain: Driver Families / drivers/mfd.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.